Alexandre Ghiti ed9eb20694 riscv: Correctly set the device-tree entry 'mmu-type' ... The 'mmu-type' should reflect what the hardware is capable of so use the new satp_mode field in RISCVCPUConfig to do that. Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-ID: <20230303131252.892893-6-alexghiti@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-03-06 08:09:44 -08:00
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boot.c	hw/riscv/boot.c: make riscv_load_initrd() static	2023-02-16 07:55:37 -08:00
Kconfig	hw/riscv: Sort machines Kconfig options in alphabetical order	2023-01-06 10:42:55 +10:00
meson.build	hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines	2021-07-20 15:32:49 +02:00
microchip_pfsoc.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
numa.c	hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()	2023-01-20 10:14:14 +10:00
opentitan.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()	2022-09-07 09:18:33 +02:00
sifive_e.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
sifive_u.c	hw/riscv: Move the dtb load bits outside of create_fdt()	2023-03-01 17:19:14 -08:00
spike.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
virt.c	riscv: Correctly set the device-tree entry 'mmu-type'	2023-03-06 08:09:44 -08:00