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d70080c4e3
Add MIPS ASE DSP testcases. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
16 lines
212 B
ArmAsm
16 lines
212 B
ArmAsm
/*
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* Startup Code for MIPS64 CPU-core
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*
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*/
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.text
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.globl _start
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.align 4
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_start:
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ori $2, $2, 0xffff
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sll $2, $2, 16
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ori $2, $2, 0xffff
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mtc0 $2, $12, 0
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jal main
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end:
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b end
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