qemu/hw/riscv/Kconfig
Bin Meng e35d617919 hw/riscv: microchip_pfsoc: Connect the IOSCB module
Previously IOSCB_CFG was created as an unimplemented device. With
the new IOSCB model, its memory range is already covered by the
IOSCB hence remove the previous unimplemented device creation in
the SoC codes.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-6-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03 07:17:23 -08:00

64 lines
1.2 KiB
Text

config IBEX
bool
config MICROCHIP_PFSOC
bool
select CADENCE_SDHCI
select MCHP_PFSOC_DMC
select MCHP_PFSOC_IOSCB
select MCHP_PFSOC_MMUART
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_PDMA
select SIFIVE_PLIC
select UNIMP
config OPENTITAN
bool
select IBEX
select UNIMP
config RISCV_VIRT
bool
imply PCI_DEVICES
imply TEST_DEVICES
select GOLDFISH_RTC
select MSI_NONBROKEN
select PCI
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select SERIAL
select SIFIVE_CLINT
select SIFIVE_PLIC
select SIFIVE_TEST
select VIRTIO_MMIO
config SIFIVE_E
bool
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_GPIO
select SIFIVE_PLIC
select SIFIVE_UART
select SIFIVE_E_PRCI
select UNIMP
config SIFIVE_U
bool
select CADENCE
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_GPIO
select SIFIVE_PDMA
select SIFIVE_PLIC
select SIFIVE_UART
select SIFIVE_U_OTP
select SIFIVE_U_PRCI
select UNIMP
config SPIKE
bool
select HTIF
select MSI_NONBROKEN
select SIFIVE_CLINT
select SIFIVE_PLIC