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The XIVE IRQ backend uses the same layout as the new XICS backend but covers the full range of the IRQ number space. The IRQ numbers for the CPU IPIs are allocated at the bottom of this space, below 4K, to preserve compatibility with XICS which does not use that range. This should be enough given that the maximum number of CPUs is 1024 for the sPAPR machine under QEMU. For the record, the biggest POWER8 or POWER9 system has a maximum of 1536 HW threads (16 sockets, 192 cores, SMT8). Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
59 lines
2 KiB
C
59 lines
2 KiB
C
/*
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* QEMU PowerPC sPAPR IRQ backend definitions
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*
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* Copyright (c) 2018, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef HW_SPAPR_IRQ_H
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#define HW_SPAPR_IRQ_H
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/*
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* IRQ range offsets per device type
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*/
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#define SPAPR_IRQ_IPI 0x0
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#define SPAPR_IRQ_EPOW 0x1000 /* XICS_IRQ_BASE offset */
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#define SPAPR_IRQ_HOTPLUG 0x1001
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#define SPAPR_IRQ_VIO 0x1100 /* 256 VIO devices */
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#define SPAPR_IRQ_PCI_LSI 0x1200 /* 32+ PHBs devices */
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#define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered
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* by the bitmap allocator */
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typedef struct sPAPRMachineState sPAPRMachineState;
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void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis);
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int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align,
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Error **errp);
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void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num);
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void spapr_irq_msi_reset(sPAPRMachineState *spapr);
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typedef struct sPAPRIrq {
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uint32_t nr_irqs;
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uint32_t nr_msis;
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void (*init)(sPAPRMachineState *spapr, Error **errp);
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int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
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void (*free)(sPAPRMachineState *spapr, int irq, int num);
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qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq);
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void (*print_info)(sPAPRMachineState *spapr, Monitor *mon);
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} sPAPRIrq;
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extern sPAPRIrq spapr_irq_xics;
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extern sPAPRIrq spapr_irq_xics_legacy;
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extern sPAPRIrq spapr_irq_xive;
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void spapr_irq_init(sPAPRMachineState *spapr, Error **errp);
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int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp);
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void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num);
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qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq);
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/*
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* XICS legacy routines
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*/
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int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **errp);
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#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp)
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#endif
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