qemu/target
Richard Henderson db36e14501 target/arm: Use PLD, PLDW, PLI not NOP for t32
This fixes a bug in that neither PLI nor PLDW are present in ARMv6T2,
but are introduced with ARMv7 and ARMv7MP respectively.
For clarity, do not use NOP for PLD.

Note that there is no PLDW (literal). Architecturally in the
T1 encoding of "PLD (literal)" bit 5 is "(0)", which means
that it should be zero and if it is not then the behaviour
is CONSTRAINED UNPREDICTABLE (might UNDEF, NOP, or ignore the
value of the bit).

In our implementation we have patterns for both:

+    PLD          1111 1000 -001 1111 1111 ------------        # (literal)
+    PLD          1111 1000 -011 1111 1111 ------------        # (literal)

and so we effectively ignore the value of bit 5.  (This is a
permitted option for this CONSTRAINED UNPREDICTABLE.) This isn't a
behaviour change in this commit, since we previously had NOP lines
for both those patterns.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-3-richard.henderson@linaro.org
[PMM: adjusted commit message to note that PLD (lit) T1 bit 5
being 1 is an UNPREDICTABLE case.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-05-28 14:23:52 +01:00
..
alpha accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
arm target/arm: Use PLD, PLDW, PLI not NOP for t32 2024-05-28 14:23:52 +01:00
avr target/avr: Use translator_lduw 2024-05-15 08:55:19 +02:00
cris target/cris: Use cris_fetch in translate_v10.c.inc 2024-05-15 08:55:19 +02:00
hexagon target/hexagon: Use translator_ldl in pkt_crosses_page 2024-05-15 08:55:19 +02:00
hppa target/hppa: 2024-05-15 11:46:58 +02:00
i386 target/i386: Introduce X86Access and use for xsave and friends 2024-05-26 17:51:00 -07:00
loongarch target/loongarch: Add loongarch vector property unconditionally 2024-05-23 09:30:41 +08:00
m68k accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
microblaze target/microblaze: Use translator_ldl 2024-05-15 08:55:19 +02:00
mips accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
openrisc accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
ppc target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot() 2024-05-24 09:43:14 +10:00
riscv target/riscv: Use translator_ld* for everything 2024-05-15 08:55:19 +02:00
rx target/rx: Use translator_ld* 2024-05-15 08:55:19 +02:00
s390x target/s390x: Use translator_lduw in get_next_pc 2024-05-15 08:55:19 +02:00
sh4 accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
sparc accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
tricore accel/tcg: Provide default implementation of disas_log 2024-05-15 08:55:18 +02:00
xtensa target/xtensa: Use translator_ldub in xtensa_insn_len 2024-05-15 08:55:19 +02:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00