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https://github.com/Motorhead1991/qemu.git
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db1015e92e
Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \
--pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName"
declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
$(git grep -l '' -- '*.[ch]')
which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
81 lines
2.1 KiB
C
81 lines
2.1 KiB
C
/*
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* ARM AHB5 TrustZone Memory Protection Controller emulation
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*
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* Copyright (c) 2018 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/* This is a model of the TrustZone memory protection controller (MPC).
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* It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM
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* (DDI 0571G):
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* https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
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*
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* The MPC sits in front of memory and allows secure software to
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* configure it to either pass through or reject transactions.
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* Rejected transactions may be configured to either be aborted, or to
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* behave as RAZ/WI. An interrupt can be signalled for a rejected transaction.
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*
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* The MPC has a register interface which the guest uses to configure it.
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*
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* QEMU interface:
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* + sysbus MMIO region 0: MemoryRegion for the MPC's config registers
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* + sysbus MMIO region 1: MemoryRegion for the upstream end of the MPC
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* + Property "downstream": MemoryRegion defining the downstream memory
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* + Named GPIO output "irq": set for a transaction-failed interrupt
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*/
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#ifndef TZ_MPC_H
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#define TZ_MPC_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_TZ_MPC "tz-mpc"
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typedef struct TZMPC TZMPC;
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#define TZ_MPC(obj) OBJECT_CHECK(TZMPC, (obj), TYPE_TZ_MPC)
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#define TZ_NUM_PORTS 16
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#define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region"
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struct TZMPC {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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/* State */
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uint32_t ctrl;
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uint32_t blk_idx;
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uint32_t int_stat;
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uint32_t int_en;
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uint32_t int_info1;
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uint32_t int_info2;
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uint32_t *blk_lut;
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qemu_irq irq;
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/* Properties */
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MemoryRegion *downstream;
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hwaddr blocksize;
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uint32_t blk_max;
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/* MemoryRegions exposed to user */
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MemoryRegion regmr;
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IOMMUMemoryRegion upstream;
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/* MemoryRegion used internally */
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MemoryRegion blocked_io;
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AddressSpace downstream_as;
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AddressSpace blocked_io_as;
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};
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#endif
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