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d66d3d4ab9
The powerpc_excp_t definition is only used by target/ppc/, no need to expose it. Restrict it by moving it to "target/ppc/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231013125630.95116-6-philmd@linaro.org>
124 lines
4.7 KiB
C
124 lines
4.7 KiB
C
/*
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* QEMU PowerPC CPU QOM header (target agnostic)
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_PPC_CPU_QOM_H
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#define QEMU_PPC_CPU_QOM_H
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#include "hw/core/cpu.h"
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#ifdef TARGET_PPC64
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#define TYPE_POWERPC_CPU "powerpc64-cpu"
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#else
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#define TYPE_POWERPC_CPU "powerpc-cpu"
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#endif
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OBJECT_DECLARE_CPU_TYPE(PowerPCCPU, PowerPCCPUClass, POWERPC_CPU)
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#define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU
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#define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX
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#define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host")
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/*****************************************************************************/
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/* MMU model */
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typedef enum powerpc_mmu_t powerpc_mmu_t;
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enum powerpc_mmu_t {
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POWERPC_MMU_UNKNOWN = 0x00000000,
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/* Standard 32 bits PowerPC MMU */
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POWERPC_MMU_32B = 0x00000001,
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/* PowerPC 6xx MMU with software TLB */
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POWERPC_MMU_SOFT_6xx = 0x00000002,
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/*
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* PowerPC 74xx MMU with software TLB (this has been
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* disabled, see git history for more information.
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* keywords: tlbld tlbli TLBMISS PTEHI PTELO)
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*/
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POWERPC_MMU_SOFT_74xx = 0x00000003,
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/* PowerPC 4xx MMU with software TLB */
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POWERPC_MMU_SOFT_4xx = 0x00000004,
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/* PowerPC MMU in real mode only */
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POWERPC_MMU_REAL = 0x00000006,
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/* Freescale MPC8xx MMU model */
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POWERPC_MMU_MPC8xx = 0x00000007,
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/* BookE MMU model */
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POWERPC_MMU_BOOKE = 0x00000008,
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/* BookE 2.06 MMU model */
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POWERPC_MMU_BOOKE206 = 0x00000009,
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#define POWERPC_MMU_64 0x00010000
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/* 64 bits PowerPC MMU */
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POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
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/* Architecture 2.03 and later (has LPCR) */
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POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
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/* Architecture 2.06 variant */
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POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003,
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/* Architecture 2.07 variant */
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POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004,
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/* Architecture 3.00 variant */
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POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
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};
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static inline bool mmu_is_64bit(powerpc_mmu_t mmu_model)
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{
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return mmu_model & POWERPC_MMU_64;
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}
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/*****************************************************************************/
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/* Input pins model */
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typedef enum powerpc_input_t powerpc_input_t;
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enum powerpc_input_t {
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PPC_FLAGS_INPUT_UNKNOWN = 0,
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/* PowerPC 6xx bus */
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PPC_FLAGS_INPUT_6xx,
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/* BookE bus */
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PPC_FLAGS_INPUT_BookE,
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/* PowerPC 405 bus */
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PPC_FLAGS_INPUT_405,
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/* PowerPC 970 bus */
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PPC_FLAGS_INPUT_970,
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/* PowerPC POWER7 bus */
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PPC_FLAGS_INPUT_POWER7,
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/* PowerPC POWER9 bus */
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PPC_FLAGS_INPUT_POWER9,
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/* Freescale RCPU bus */
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PPC_FLAGS_INPUT_RCPU,
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};
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#ifndef CONFIG_USER_ONLY
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typedef struct PPCTimebase {
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uint64_t guest_timebase;
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int64_t time_of_the_day_ns;
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bool runstate_paused;
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} PPCTimebase;
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extern const VMStateDescription vmstate_ppc_timebase;
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#define VMSTATE_PPC_TIMEBASE_V(_field, _state, _version) { \
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.name = (stringify(_field)), \
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.version_id = (_version), \
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.size = sizeof(PPCTimebase), \
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.vmsd = &vmstate_ppc_timebase, \
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.flags = VMS_STRUCT, \
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.offset = vmstate_offset_value(_state, _field, PPCTimebase), \
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}
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void cpu_ppc_clock_vm_state_change(void *opaque, bool running,
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RunState state);
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#endif
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#endif
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