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qemu/target/arm
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Peter Maydell d507bc3b05 target/arm: Declare support for FEAT_RASv1p1 
The architectural feature RASv1p1 introduces the following new
features:
 * new registers ERXPFGCDN_EL1, ERXPFGCTL_EL1 and ERXPFGF_EL1
 * new bits in the fine-grained trap registers that control traps
   for these new registers
 * new trap bits HCR_EL2.FIEN and SCR_EL3.FIEN that control traps
   for ERXPFGCDN_EL1, ERXPFGCTL_EL1, ERXPFGP_EL1
 * a larger number of the ERXMISC<n>_EL1 registers
 * the format of ERR<n>STATUS registers changes

The architecture permits that if ERRIDR_EL1.NUM is 0 (as it is for
QEMU) then all these new registers may UNDEF, and the HCR_EL2.FIEN
and SCR_EL3.FIEN bits may be RES0.  We don't have any ERR<n>STATUS
registers (again, because ERRIDR_EL1.NUM is 0).  QEMU does not yet
implement the fine-grained-trap extension.  So there is nothing we
need to implement to be compliant with the feature spec.  Make the
'max' CPU report the feature in its ID registers, and document it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220531114258.855804-1-peter.maydell@linaro.org
2022-06-08 19:38:46 +01:00
..
hvf target/arm/hvf: Include missing "cpregs.h" 2022-05-30 10:35:54 +01:00
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
a32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
arch_dump.c target/arm: add spaces around operator 2020-11-10 11:03:47 +00:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
cpregs.h target/arm: Implement FEAT_IDST 2022-05-19 16:19:02 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/arm: Use FIELD definitions for CPACR, CPTR_ELx 2022-05-19 18:34:10 +01:00
cpu.h target/arm: Use FIELD definitions for CPACR, CPTR_ELx 2022-05-19 18:34:10 +01:00
cpu64.c target/arm: Declare support for FEAT_RASv1p1 2022-06-08 19:38:46 +01:00
cpu_tcg.c target/arm: Make number of counters in PMCR follow the CPU 2022-05-19 16:19:02 +01:00
crypto_helper.c crypto: move sm4_sbox from target/arm 2022-04-29 10:47:45 +10:00
debug_helper.c target/arm: Use field names for accessing DBGWCRn 2022-04-28 13:40:16 +01:00
gdbstub.c target/arm: Store cpregs key in the hash table directly 2022-05-05 09:35:51 +01:00
gdbstub64.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
helper-a64.c target/arm: Change CPUArchState.aarch64 to bool 2022-04-22 14:44:54 +01:00
helper-a64.h target/arm: Merge mte_check1, mte_checkN 2021-04-30 11:16:49 +01:00
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sve.h target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
helper.c target/arm: Use FIELD definitions for CPACR, CPTR_ELx 2022-05-19 18:34:10 +01:00
helper.h target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
hvf_arm.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Make number of counters in PMCR follow the CPU 2022-05-19 16:19:02 +01:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm-consts.h target/arm: Report KVM's actual PSCI version to guest in dtb 2022-03-02 19:27:37 +00:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm64.c target/arm: Make number of counters in PMCR follow the CPU 2022-05-19 16:19:02 +01:00
kvm_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
m-nocp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
m_helper.c target/arm: Change CPUArchState.thumb to bool 2022-04-22 14:44:54 +01:00
machine.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
meson.build arm: Add Hypervisor.framework build target 2021-09-21 16:28:26 +01:00
monitor.c target/arm: Add cpu properties to control pauth 2021-01-19 14:38:51 +00:00
mte_helper.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
mve_helper.c target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
neon-dp.decode target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon_helper.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target/arm: Implement FEAT_IDST 2022-05-19 16:19:02 +01:00
pauth_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
psci.c target/arm: Support PSCI 1.1 and SMCCC 1.0 2022-03-02 19:27:36 +00:00
sve.decode target/arm: Use TRANS_FEAT for FMMLA 2022-05-30 17:05:09 +01:00
sve_helper.c target/arm: Move sve zip high_ofs into simd_data 2022-05-30 17:05:08 +01:00
syndrome.h target/arm: Implement virtual SError exceptions 2022-05-09 11:47:54 +01:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
t32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
tlb_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a32.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
translate-a64.c target/arm: Remove aa64_sve check from before disas_sve 2022-05-30 17:05:12 +01:00
translate-a64.h target/arm: Drop unsupported_encoding() macro 2022-05-19 16:19:02 +01:00
translate-m-nocp.c target/arm: Use tcg_constant in translate-m-nocp.c 2022-04-22 14:44:54 +01:00
translate-mve.c target/arm: Optimize MVE 1op-immediate insns 2021-09-21 16:28:27 +01:00
translate-neon.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
translate-sve.c target/arm: Add sve feature check for remaining trans_* functions 2022-05-30 17:05:11 +01:00
translate-vfp.c target/arm: Use tcg_constant in translate-vfp.c 2022-04-22 14:44:55 +01:00
translate.c target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
translate.h target/arm: Introduce TRANS, TRANS_FEAT 2022-05-30 17:05:04 +01:00
vec_helper.c target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vec_internal.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00