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https://github.com/Motorhead1991/qemu.git
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6482e9d2a4
Make deposit "unconditional" in the sense that the opcode is always present. Rely instead on TCG_TARGET_deposit_valid, now always defined. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
81 lines
2.9 KiB
C
81 lines
2.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define target-specific opcode support
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* Copyright (c) 2009, 2011 Stefan Weil
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*/
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#ifndef TCG_TARGET_HAS_H
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#define TCG_TARGET_HAS_H
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#define TCG_TARGET_HAS_bswap16_i32 1
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#define TCG_TARGET_HAS_bswap32_i32 1
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#define TCG_TARGET_HAS_div_i32 1
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#define TCG_TARGET_HAS_rem_i32 1
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#define TCG_TARGET_HAS_ext8s_i32 1
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#define TCG_TARGET_HAS_ext16s_i32 1
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#define TCG_TARGET_HAS_ext8u_i32 1
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#define TCG_TARGET_HAS_ext16u_i32 1
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#define TCG_TARGET_HAS_andc_i32 1
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#define TCG_TARGET_HAS_extract2_i32 0
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#define TCG_TARGET_HAS_eqv_i32 1
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#define TCG_TARGET_HAS_nand_i32 1
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#define TCG_TARGET_HAS_nor_i32 1
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#define TCG_TARGET_HAS_clz_i32 1
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#define TCG_TARGET_HAS_ctz_i32 1
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#define TCG_TARGET_HAS_ctpop_i32 1
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#define TCG_TARGET_HAS_not_i32 1
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#define TCG_TARGET_HAS_orc_i32 1
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#define TCG_TARGET_HAS_rot_i32 1
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#define TCG_TARGET_HAS_negsetcond_i32 0
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#define TCG_TARGET_HAS_muls2_i32 1
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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#define TCG_TARGET_HAS_qemu_st8_i32 0
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#if TCG_TARGET_REG_BITS == 64
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#define TCG_TARGET_HAS_extr_i64_i32 0
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#define TCG_TARGET_HAS_bswap16_i64 1
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#define TCG_TARGET_HAS_bswap32_i64 1
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#define TCG_TARGET_HAS_bswap64_i64 1
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#define TCG_TARGET_HAS_extract2_i64 0
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#define TCG_TARGET_HAS_div_i64 1
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#define TCG_TARGET_HAS_rem_i64 1
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#define TCG_TARGET_HAS_ext8s_i64 1
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#define TCG_TARGET_HAS_ext16s_i64 1
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#define TCG_TARGET_HAS_ext32s_i64 1
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#define TCG_TARGET_HAS_ext8u_i64 1
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#define TCG_TARGET_HAS_ext16u_i64 1
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#define TCG_TARGET_HAS_ext32u_i64 1
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#define TCG_TARGET_HAS_andc_i64 1
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#define TCG_TARGET_HAS_eqv_i64 1
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#define TCG_TARGET_HAS_nand_i64 1
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#define TCG_TARGET_HAS_nor_i64 1
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#define TCG_TARGET_HAS_clz_i64 1
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#define TCG_TARGET_HAS_ctz_i64 1
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#define TCG_TARGET_HAS_ctpop_i64 1
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#define TCG_TARGET_HAS_not_i64 1
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#define TCG_TARGET_HAS_orc_i64 1
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#define TCG_TARGET_HAS_rot_i64 1
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#define TCG_TARGET_HAS_negsetcond_i64 0
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#define TCG_TARGET_HAS_muls2_i64 1
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#define TCG_TARGET_HAS_mulu2_i32 1
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#define TCG_TARGET_HAS_add2_i64 1
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#define TCG_TARGET_HAS_sub2_i64 1
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#define TCG_TARGET_HAS_mulu2_i64 1
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#define TCG_TARGET_HAS_muluh_i64 0
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#define TCG_TARGET_HAS_mulsh_i64 0
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#else
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#define TCG_TARGET_HAS_mulu2_i32 1
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#endif /* TCG_TARGET_REG_BITS == 64 */
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#define TCG_TARGET_HAS_qemu_ldst_i128 0
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#define TCG_TARGET_HAS_tst 1
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#define TCG_TARGET_extract_valid(type, ofs, len) 1
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#define TCG_TARGET_sextract_valid(type, ofs, len) 1
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#define TCG_TARGET_deposit_valid(type, ofs, len) 1
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#endif
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