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The PQ_disable configuration bit disables the check done on the PQ state bits when processing new MSI interrupts. When bit 9 is enabled, the PHB forwards any MSI trigger to the XIVE interrupt controller without checking the PQ state bits. The XIVE IC knows from the trigger message that the PQ bits have not been checked and performs the check locally. This configuration bit only applies to MSIs and LSIs are still checked on the PHB to handle the assertion level. PQ_disable enablement is a requirement for StoreEOI. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> |
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| .. | ||
| designware.h | ||
| gpex.h | ||
| i440fx.h | ||
| mv64361.h | ||
| pam.h | ||
| pnv_phb3.h | ||
| pnv_phb3_regs.h | ||
| pnv_phb4.h | ||
| pnv_phb4_regs.h | ||
| ppce500.h | ||
| q35.h | ||
| remote.h | ||
| sabre.h | ||
| spapr.h | ||
| uninorth.h | ||
| xilinx-pcie.h | ||