Cheng Yang 0390039950 hw/riscv/boot.c: Support 64-bit address for initrd ... Use qemu_fdt_setprop_u64() instead of qemu_fdt_setprop_cell() to set the address of initrd in FDT to support 64-bit address. Signed-off-by: Cheng Yang <yangcheng.work@foxmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <tencent_A4482251DD0890F312758FA6B33F60815609@qq.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2024-06-03 11:12:11 +10:00
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boot.c	hw/riscv/boot.c: Support 64-bit address for initrd	2024-06-03 11:12:11 +10:00
Kconfig	kconfig: express dependency of individual boards on libfdt	2024-05-10 15:45:15 +02:00
meson.build	meson: pick libfdt from common_ss when building target-specific files	2024-05-10 15:45:15 +02:00
microchip_pfsoc.c	hw/riscv: use qemu_configure_nic_device()	2024-02-02 16:23:47 +00:00
numa.c	hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix()	2024-02-09 20:43:14 +10:00
opentitan.c	hw/riscv: opentitan: Fixup local variables shadowing	2023-09-29 10:07:20 +02:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv/shakti_c: Check CPU type in machine_run_board_init()	2024-01-05 16:20:15 +01:00
sifive_e.c	riscv: Fix SiFive E CLINT clock frequency	2023-11-22 13:57:19 +10:00
sifive_u.c	target/riscv: support new isa extension detection devicetree properties	2024-02-09 20:43:14 +10:00
spike.c	target/riscv: support new isa extension detection devicetree properties	2024-02-09 20:43:14 +10:00
virt-acpi-build.c	target/riscv: fix ACPI MCFG table	2024-03-08 21:00:37 +10:00
virt.c	hw/riscv/virt: Replace sprintf by g_strdup_printf	2024-04-25 12:48:12 +02:00