Bin Meng 0694dabe97 hw/ssi: Add SiFive SPI controller support ... This adds the SiFive SPI controller model for the FU540 SoC. The direct memory-mapped SPI flash mode is unsupported. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-4-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-03-04 09:43:29 -05:00
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aspeed_smc.h	hw/ssi/aspeed_smc: Rename 'max_slaves' variable as 'max_peripherals'	2020-12-10 12:15:03 -05:00
imx_spi.h	hw/ssi: imx_spi: Use a macro for number of chip selects supported	2021-02-02 17:00:54 +00:00
mss-spi.h	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
npcm7xx_fiu.h	hw/ssi: NPCM7xx Flash Interface Unit device model	2020-09-14 14:24:59 +01:00
pl022.h	arm: Update infocenter.arm.com URLs	2021-02-11 11:50:14 +00:00
sifive_spi.h	hw/ssi: Add SiFive SPI controller support	2021-03-04 09:43:29 -05:00
ssi.h	hw/ssi: Rename SSI 'slave' as 'peripheral'	2020-12-10 12:15:03 -05:00
stm32f2xx_spi.h	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
xilinx_spips.h	hw/core/stream: Rename StreamSlave as StreamSink	2020-12-10 12:15:04 -05:00