Richard Henderson c1a1f80518 target/arm: Relax ordered/atomic alignment checks for LSE2 ... FEAT_LSE2 only requires that atomic operations not cross a 16-byte boundary. Ordered operations may be completely unaligned if SCTLR.nAA is set. Because this alignment check is so special, do it by hand. Make sure not to keep TCG temps live across the branch. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230530191438.411344-17-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2023-06-06 10:19:38 +01:00
..
a32-uncond.decode
a32.decode
a64.decode	target/arm: Convert ERET, ERETAA, ERETAB to decodetree	2023-05-18 11:35:38 +01:00
arm_ldst.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
cpu32.c	target/arm: move cpu_tcg to tcg/cpu32.c	2023-05-02 10:54:31 +01:00
cpu64.c	target/arm: move cpu_tcg to tcg/cpu32.c	2023-05-02 10:54:31 +01:00
crypto_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
helper-a64.c	target/arm: Relax ordered/atomic alignment checks for LSE2	2023-06-06 10:19:38 +01:00
helper-a64.h	target/arm: Relax ordered/atomic alignment checks for LSE2	2023-06-06 10:19:38 +01:00
helper-mve.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
helper-sme.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
helper-sve.h	target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/	2023-05-12 15:43:37 +01:00
hflags.c	target/arm: Add SCTLR.nAA to TBFLAG_A64	2023-06-06 10:19:38 +01:00
iwmmxt_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
m-nocp.decode
m_helper.c	accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu	2023-05-23 18:54:28 -07:00
meson.build	target/arm: Create decodetree skeleton for A64	2023-05-18 11:16:45 +01:00
mte_helper.c	target/arm: Check alignment in helper_mte_check	2023-06-06 10:19:38 +01:00
mve.decode
mve_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
neon-dp.decode
neon-ls.decode
neon-shared.decode
neon_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
op_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
pauth_helper.c	target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check	2023-05-12 16:01:25 +01:00
psci.c	target/arm: Move psci.c into the tcg directory	2023-02-27 13:27:04 +00:00
sme-fa64.decode
sme.decode
sme_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
sve.decode
sve_helper.c	target/arm: Fix vd == vm overlap in sve_ldff1_z	2023-05-18 10:31:43 +01:00
sve_ldst_internal.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
t16.decode
t32.decode
tlb_helper.c	target/arm: Explicitly select short-format FSR for M-profile	2023-05-30 15:50:17 +01:00
translate-a32.h	target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/	2023-05-12 15:43:36 +01:00
translate-a64.c	target/arm: Relax ordered/atomic alignment checks for LSE2	2023-06-06 10:19:38 +01:00
translate-a64.h	target/arm: Pass single_memop to gen_mte_checkN	2023-06-06 10:19:37 +01:00
translate-m-nocp.c	target/arm: Tidy helpers for translation	2023-06-05 12:04:29 -07:00
translate-mve.c	target/arm: Tidy helpers for translation	2023-06-05 12:04:29 -07:00
translate-neon.c	target/arm: Tidy helpers for translation	2023-06-05 12:04:29 -07:00
translate-sme.c	target/arm: Tidy helpers for translation	2023-06-05 12:04:29 -07:00
translate-sve.c	target/arm: Pass single_memop to gen_mte_checkN	2023-06-06 10:19:37 +01:00
translate-vfp.c	target/arm: Tidy helpers for translation	2023-06-05 12:04:29 -07:00
translate.c	target/arm: Introduce finalize_memop_{atom,pair}	2023-06-06 10:19:35 +01:00
translate.h	target/arm: Add SCTLR.nAA to TBFLAG_A64	2023-06-06 10:19:38 +01:00
vec_helper.c	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
vec_internal.h	target/arm: move helpers to tcg/	2023-02-27 13:27:04 +00:00
vfp-uncond.decode
vfp.decode