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3448d47b31
For AArch32 LDREXD and STREXD, architecturally the 32-bit word at the lowest address is always Rt and the one at addr+4 is Rt2, even if the CPU is big-endian. Our implementation does these with a single 64-bit store, so if we're big-endian then we need to put the two 32-bit halves together in the opposite order to little-endian, so that they end up in the right places. We were trying to do this with the gen_aa32_frob64() function, but that is not correct for the usermode emulator, because there there is a distinction between "load a 64 bit value" (which does a BE 64-bit access and doesn't need swapping) and "load two 32 bit values as one 64 bit access" (where we still need to do the swapping, like system mode BE32). Fixes: https://bugs.launchpad.net/qemu/+bug/1725267 Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1509622400-13351-1-git-send-email-peter.maydell@linaro.org |
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| .. | ||
| arch_dump.c | ||
| arm-powerctl.c | ||
| arm-powerctl.h | ||
| arm-semi.c | ||
| arm_ldst.h | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| cpu64.c | ||
| crypto_helper.c | ||
| gdbstub.c | ||
| gdbstub64.c | ||
| helper-a64.c | ||
| helper-a64.h | ||
| helper.c | ||
| helper.h | ||
| internals.h | ||
| iwmmxt_helper.c | ||
| kvm-consts.h | ||
| kvm-stub.c | ||
| kvm.c | ||
| kvm32.c | ||
| kvm64.c | ||
| kvm_arm.h | ||
| machine.c | ||
| Makefile.objs | ||
| monitor.c | ||
| neon_helper.c | ||
| op_addsub.h | ||
| op_helper.c | ||
| psci.c | ||
| trace-events | ||
| translate-a64.c | ||
| translate.c | ||
| translate.h | ||