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target/arm/helper.c is very large and unwieldy. One subset of code that we can pull out into its own file is the cpreg arrays and corresponding functions for the TLBI instructions. Because these are instructions they are only relevant for TCG and we can make the new file only be built for CONFIG_TCG. In this commit we move the AArch32 instructions from: not_v7_cp_reginfo[] v7_cp_reginfo[] v7mp_cp_reginfo[] v8_cp_reginfo[] into a new file target/arm/tcg/tlb-insns.c. A few small functions are used both by functions we haven't yet moved across and by functions we have already moved. We temporarily make these global with a prototype in cpregs.h; when the move of all TLBI insns is complete these will return to being file-local. For CONFIG_TCG, this is just moving code around. For a KVM only build, these cpregs will no longer be added to the cpregs hashtable for the CPU. However this should not be a behaviour change, because: * we never try to migration sync or otherwise include ARM_CP_NO_RAW cpregs * for migration we treat the kernel's list of system registers as the authoritative one, so these TLBI insns were never in it anyway The no-tcg stub of define_tlb_insn_regs() therefore does nothing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241210160452.2427965-2-peter.maydell@linaro.org
32 lines
796 B
C
32 lines
796 B
C
/*
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* QEMU ARM stubs for some TCG helper functions
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*
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* Copyright 2021 SUSE LLC
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "internals.h"
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void write_v7m_exception(CPUARMState *env, uint32_t new_exc)
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{
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g_assert_not_reached();
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}
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void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
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uint32_t target_el, uintptr_t ra)
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{
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g_assert_not_reached();
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}
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/* Temporarily while cpu_get_tb_cpu_state() is still in common code */
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void assert_hflags_rebuild_correctly(CPUARMState *env)
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{
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}
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/* TLBI insns are only used by TCG, so we don't need to do anything for KVM */
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void define_tlb_insn_regs(ARMCPU *cpu)
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{
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}
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