Philippe Mathieu-Daudé c12b1e67d5 hw/isa/piix4: Correct IRQRC[A:D] reset values ... IRQRC[A:D] registers reset value is 0x80. We were forcing the MIPS Malta machine routing to be able to boot a Linux kernel without any bootloader. We now have these registers initialized in the Malta machine write_bootloader(), so we can use the correct reset values. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20221027204720.33611-4-philmd@linaro.org>		2023-01-13 09:32:32 +01:00
..
apm.c	nomaintainer: Fix Lesser GPL version number	2020-11-15 17:04:40 +01:00
i82378.c	include/hw/pci: Split pci_device.h off pci.h	2023-01-08 01:54:22 -05:00
isa-bus.c	isa-bus: drop no longer used ISADeviceClass::build_aml	2022-06-09 19:32:48 -04:00
isa-superio.c	Do not include sysemu/sysemu.h if it's not really necessary	2021-05-02 17:24:50 +02:00
Kconfig	hw/isa/Kconfig: Add missing dependency to VT82C686	2023-01-08 01:54:21 -05:00
lpc_ich9.c	hw/isa: enable TCO watchdog reboot pin strap by default	2022-12-21 06:35:28 -05:00
meson.build	meson: convert hw/isa	2020-08-21 06:30:29 -04:00
pc87312.c	pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312	2020-09-09 13:20:22 -04:00
piix3.c	acpi: x86: move RPQx field back to _SB scope	2022-11-22 05:19:00 -05:00
piix4.c	hw/isa/piix4: Correct IRQRC[A:D] reset values	2023-01-13 09:32:32 +01:00
smc37c669-superio.c	hw/isa/superio: Correct the license text	2020-04-01 19:00:16 +02:00
trace-events	hw/isa: add trace events for ICH9 LPC chip config access	2022-12-21 06:35:28 -05:00
trace.h	trace: switch position of headers to what Meson requires	2020-08-21 06:18:24 -04:00
vt82c686.c	hw/isa/vt82c686: Create rtc-time alias in boards instead	2022-10-31 11:32:07 +01:00