mirror of
https://github.com/Motorhead1991/qemu.git
synced 2026-02-26 22:25:12 -07:00
We have confused the number of instructions that have been
executed in the TB with the number of instructions needed
to repeat the I/O instruction.
We have used cpu_restore_state_from_tb, which means that
the guest pc is pointing to the I/O instruction. The only
time the answer to the later question is not 1 is when
MIPS or SH4 need to re-execute the branch for the delay
slot as well.
We must rely on cpu->cflags_next_tb to generate the next TB,
as otherwise we have a race condition with other guest cpus
within the TB cache.
Fixes:
|
||
|---|---|---|
| .. | ||
| atomic_template.h | ||
| cpu-exec-common.c | ||
| cpu-exec.c | ||
| cputlb.c | ||
| Makefile.objs | ||
| softmmu_template.h | ||
| tcg-all.c | ||
| tcg-runtime-gvec.c | ||
| tcg-runtime.c | ||
| tcg-runtime.h | ||
| trace-events | ||
| translate-all.c | ||
| translate-all.h | ||
| translator.c | ||
| user-exec-stub.c | ||
| user-exec.c | ||