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Zack Buhman be88ed87a6 target/sh4: mac.w: memory accesses are 16-bit words 
Before this change, executing a code sequence such as:

           mova   tblm,r0
           mov    r0,r1
           mova   tbln,r0
           clrs
           clrmac
           mac.w  @r0+,@r1+
           mac.w  @r0+,@r1+

           .align 4
  tblm:    .word  0x1234
           .word  0x5678
  tbln:    .word  0x9abc
           .word  0xdefg

Does not result in correct behavior:

Expected behavior:
  first macw : macl = 0x1234 * 0x9abc + 0x0
               mach = 0x0

  second macw: macl = 0x5678 * 0xdefg + 0xb00a630
               mach = 0x0

Observed behavior (qemu-sh4eb, prior to this commit):

  first macw : macl = 0x5678 * 0xdefg + 0x0
               mach = 0x0

  second macw: (unaligned longword memory access, SIGBUS)

Various SH-4 ISA manuals also confirm that `mac.w` is a 16-bit word memory
access, not a 32-bit longword memory access.

Signed-off-by: Zack Buhman <zack@buhman.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240402093756.27466-1-zack@buhman.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
(cherry picked from commit b0f2f2976b)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-04-10 20:32:12 +03:00
..
alpha hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
arm target/arm: Use correct SecuritySpace for AArch64 AT ops at EL3 2024-04-09 20:19:43 +03:00
avr hw/avr/atmega: Fix wrong initial value of stack pointer 2023-11-28 14:27:12 +01:00
cris hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
hexagon target/hexagon/idef-parser/prepare: use env to invoke bash 2023-11-28 14:26:37 +01:00
hppa target/hppa: Clear psw_n for BE on use_nullify_skip path 2024-04-01 19:23:57 +03:00
i386 target/i386/tcg: Enable page walking from MMIO memory 2024-03-27 09:47:02 +03:00
loongarch target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int' 2024-03-25 15:16:41 +03:00
m68k hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
microblaze target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
mips target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
nios2 target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
openrisc hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
ppc target/ppc: Fix crash on machine check caused by ifetch 2024-02-24 19:29:45 +03:00
riscv target/riscv/kvm: fix timebase-frequency when using KVM acceleration 2024-03-27 13:04:06 +03:00
rx hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
s390x target/s390x: Use mutable temporary value for op_ts 2024-03-25 22:13:29 +03:00
sh4 target/sh4: mac.w: memory accesses are 16-bit words 2024-04-10 20:32:12 +03:00
sparc target/sparc: Fix RETURN 2023-11-14 10:40:54 -08:00
tricore hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
xtensa target/xtensa: fix OOB TLB entry access 2024-01-27 18:04:54 +03:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00