qemu/target
Taylor Simpson bd983f68ac Hexagon (target/hexagon) Enable more short-circuit packets (scalar core)
Look for read-after-write instead of overlap of reads and writes

Here is an example with overalp but no read-after-write:
0x000200fc:  0x38103876	{	R0 = add(R0,R1); R6 = add(R6,R7) }

BEFORE:
 ---- 00000000000200fc
 mov_i32 loc2,$0x0
 mov_i32 loc2,r0
 add_i32 loc3,loc2,r1
 mov_i32 loc2,loc3
 mov_i32 loc4,$0x0
 mov_i32 loc4,r6
 add_i32 loc5,loc4,r7
 mov_i32 loc4,loc5
 mov_i32 r0,loc2
 mov_i32 r6,loc4

AFTER:
 ---- 00000000000200fc
 add_i32 loc2,r0,r1
 mov_i32 r0,loc2
 add_i32 loc3,r6,r7
 mov_i32 r6,loc3

We can also short-circuit packets with .new values by reading from the
real destination instead of the temporary.
0x00020100:  0x78005ff3	{	R19 = #0xff
0x00020104:  0x2002e204		if (cmp.eq(N19.new,R2)) jump:t PC+8 }

BEFORE:
 ---- 0000000000020100
 mov_i32 pc,$0x20108
 mov_i32 loc8,$0x0
 mov_i32 loc8,$0xff
 setcond_i32 loc10,loc8,r2,eq
 mov_i32 loc6,loc10
 mov_i32 r19,loc8
 add_i32 pkt_cnt,pkt_cnt,$0x2
 add_i32 insn_cnt,insn_cnt,$0x4
 brcond_i32 loc6,$0x0,eq,$L1
 goto_tb $0x0
 mov_i32 pc,$0x20108
 exit_tb $0x7fbb54000040
 set_label $L1
 goto_tb $0x1
 exit_tb $0x7fbb54000041
 set_label $L0
 exit_tb $0x7fbb54000043

AFTER:
 ---- 0000000000020100
 mov_i32 pc,$0x20108
 mov_i32 r19,$0xff
 setcond_i32 loc7,r19,r2,eq
 mov_i32 loc4,loc7
 add_i32 pkt_cnt,pkt_cnt,$0x2
 add_i32 insn_cnt,insn_cnt,$0x4
 brcond_i32 loc4,$0x0,eq,$L1
 goto_tb $0x0
 mov_i32 pc,$0x20108
 exit_tb $0x7f9764000040
 set_label $L1
 goto_tb $0x1
 exit_tb $0x7f9764000041
 set_label $L0
 exit_tb $0x7f9764000043

Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20240201103340.119081-3-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>
2024-05-05 16:22:07 -07:00
..
alpha target/alpha: Implement CF_PCREL 2024-05-04 08:05:51 -07:00
arm target/arm: Default to 1GHz cntfrq for 'max' and new CPUs 2024-04-30 15:14:15 +01:00
avr target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
cris hw, target: Add ResetType argument to hold and exit phase methods 2024-04-25 10:21:06 +01:00
hexagon Hexagon (target/hexagon) Enable more short-circuit packets (scalar core) 2024-05-05 16:22:07 -07:00
hppa target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
i386 - Fix NULL dereference in NVMM & WHPX init_vcpu() 2024-05-03 14:42:50 -07:00
loongarch Add boot LoongArch elf kernel with FDT 2024-04-30 07:16:56 -07:00
m68k hw, target: Add ResetType argument to hold and exit phase methods 2024-04-25 10:21:06 +01:00
microblaze target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
mips target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
openrisc target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
ppc target/ppc/cpu_init: Remove "PowerPC" prefix from the CPU list 2024-04-29 09:37:26 +03:00
riscv target/riscv/kvm: remove sneaky strerrorname_np() instance 2024-04-29 15:26:56 +03:00
rx hw, target: Add ResetType argument to hold and exit phase methods 2024-04-25 10:21:06 +01:00
s390x * Clean-ups for "errp" handling in s390x cpu_model code 2024-04-30 09:57:47 -07:00
sh4 target/sh4: Rename TCGv variables as manual for SUBV opcode 2024-05-03 17:33:26 +02:00
sparc target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 2024-04-26 15:31:37 +02:00
tricore gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' 2024-04-26 15:31:37 +02:00
xtensa target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' 2024-04-26 15:31:37 +02:00
Kconfig target/nios2: Remove the deprecated Nios II target 2024-04-24 16:03:38 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00