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qemu/tcg/arm
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Joseph Burt 9f6523e8e4 tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct 
When tcg_out_qemu_st_{index,direct} were merged, the direct case for
MO_64 was omitted, causing qemu_st_i64 to be encoded as 0xffffffff due
to underflow when adding h.base and h.index.

Fixes: 1df6d611bd ("tcg/arm: Introduce HostAddress")
Signed-off-by: Joseph Burt <caseorum@gmail.com>
Message-Id: <20240121211439.100829-1-caseorum@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-01-23 13:32:10 +10:00
..
tcg-target-con-set.h tcg/arm: Adjust constraints on qemu_ld/st 2023-05-16 15:21:39 -07:00
tcg-target-con-str.h tcg/arm: Adjust constraints on qemu_ld/st 2023-05-16 15:21:39 -07:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct 2024-01-23 13:32:10 +10:00
tcg-target.h tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
tcg-target.opc.h tcg/arm: Implement TCG_TARGET_HAS_roti_vec 2021-06-04 11:50:11 -07:00