qemu/target
Max Chou b5092b3db2 target/riscv: rvv: Fix missing exit TB flow for ldff_trans
According to the V spec, the vector fault-only-first load instructions
may change the VL CSR.
So the ldff_trans TCG translation function should generate the
lookup_and_goto_ptr flow as the vsetvl/vsetvli translation function to
make sure the vl_eq_vlmax TB flag is correct.

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250627133013.443997-1-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-04 21:09:49 +10:00
..
alpha target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
arm treewide: fix paths for relocated files in comments 2025-07-02 18:26:27 +02:00
avr target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
i386 target/i386/emulate: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
loongarch treewide: fix paths for relocated files in comments 2025-07-02 18:26:27 +02:00
m68k target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
microblaze target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
mips * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
openrisc target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
ppc * target/i386/kvm: Intel TDX support 2025-05-30 11:41:07 -04:00
riscv target/riscv: rvv: Fix missing exit TB flow for ldff_trans 2025-07-04 21:09:49 +10:00
rx target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
s390x target/s390x: A fix for the trouble with tribles 2025-07-02 18:29:57 +02:00
sh4 target: Use cpu_pointer_wrap_notreached for strict align targets 2025-05-28 08:08:47 +01:00
sparc accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW 2025-05-28 15:17:25 -04:00
tricore target: Use cpu_pointer_wrap_uint32 for 32-bit targets 2025-05-28 08:08:48 +01:00
xtensa target/xtensa: replace FSF postal address with licenses URL 2025-06-26 00:42:37 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00