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qemu/hw/pci-bridge
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Jonathan Cameron 488ad8b302 hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset() 
Reproduce issue with

configure --enable-qom-cast-debug ...

qemu-system-x86_64 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0

  hw/pci-bridge/pci_expander_bridge.c:54:PXB_DEV: Object 0x5570e0b1ada0 is not an instance of type pxb
  Aborted

The type conversion results in the right state structure, but PXB_DEV is
not a parent of PXB_CXL_DEV hence the error. Rather than directly
cleaning up the inheritance, this is the minimal fix which will be
followed by the cleanup.

Fixes: 154070eaf6 ("hw/pxb-cxl: Support passthrough HDM Decoders unless overridden")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230420142750.6950-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Cc: qemu-stable@nongnu.org
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
(cherry picked from commit 9136f661c7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-05-10 20:50:38 +03:00
..
cxl_downstream.c hw/pci-bridge/cxl_downstream: Fix type naming mismatch 2023-03-02 19:13:52 -05:00
cxl_root_port.c hw/pci-bridge/cxl_root_port: Wire up MSI 2023-03-07 12:39:00 -05:00
cxl_upstream.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
gen_pcie_root_port.c pci: acpi hotplug: rename x-native-hotplug to x-do-not-expose-native-hotplug-cap 2023-01-28 06:21:29 -05:00
i82801b11.c hw: Move ich9.h to southbridge/ 2023-02-27 22:29:01 +01:00
ioh3420.c Include migration/vmstate.h less 2019-08-16 13:31:52 +02:00
Kconfig hw/cxl/rp: Add a root port 2022-05-13 06:13:36 -04:00
meson.build remove DEC 21154 PCI bridge 2022-12-21 07:32:24 -05:00
pci_bridge_dev.c pci_bridge: remove whitespace 2023-01-28 06:21:29 -05:00
pci_expander_bridge.c hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset() 2023-05-10 20:50:38 +03:00
pci_expander_bridge_stubs.c pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. 2022-06-09 19:32:49 -04:00
pcie_pci_bridge.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
pcie_root_port.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
simba.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
xio3130_downstream.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00
xio3130_upstream.c pci: drop redundant PCIDeviceClass::is_bridge field 2022-12-21 07:32:24 -05:00