qemu/target
Daniel Henrique Barboza b609610349 target/riscv/kvm: turn u32/u64 reg functions into macros
This change is motivated by a future change w.r.t CSRs management. We
want to handle them the same way as KVM extensions, i.e. a static array
with KVMCPUConfig objs that will be read/write during init and so on.
But to do that properly we must be able to declare a static array that
hold KVM regs.

C does not allow to init static arrays and use functions as
initializers, e.g. we can't do:

.kvm_reg_id = kvm_riscv_reg_id_ulong(...)

When instantiating the array. We can do that with macros though, so our
goal is turn kvm_riscv_reg_ulong() in a macro. It is cleaner to turn
every other reg_id_*() function in macros, and ulong will end up using
the macros for u32 and u64, so we'll start with them.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250429124421.223883-4-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Cc: qemu-stable@nongnu.org
2025-05-19 13:41:35 +10:00
..
alpha target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
arm target/arm/tcg/vfp_helper: compile file twice (system, user) 2025-05-14 15:12:41 +01:00
avr accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
i386 target/i386: Make ITS_NO available to guests 2025-05-12 21:02:51 +02:00
loongarch accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
m68k accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
microblaze target/microblaze: Delay gdb_register_coprocessor() to realize 2025-05-14 14:29:45 +01:00
mips accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
openrisc target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
ppc * ci: enable RISC-V cross jobs 2025-05-07 16:10:59 -04:00
riscv target/riscv/kvm: turn u32/u64 reg functions into macros 2025-05-19 13:41:35 +10:00
rx accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
s390x hw/s390x/s390-virtio-ccw: Remove the deprecated 4.0 machine type 2025-05-14 06:58:47 +02:00
sh4 accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
sparc accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
tricore accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
xtensa accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00