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qemu/target-mips
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Petar Jovanovic b4dd99a363 target-mips: add support for CP0_Config5 
Add CP0_Config5, define rw_bitmask and enable modifications.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Eric Johnson <eric.johnson@imgtec.com>
2014-02-10 16:46:28 +01:00
..
cpu-qom.h cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
cpu.c cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" 2013-07-29 15:29:15 +02:00
cpu.h target-mips: add support for CP0_Config5 2014-02-10 16:46:28 +01:00
dsp_helper.c target-mips: Use macro ARRAY_SIZE where possible 2013-12-09 16:44:04 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper.c target-mips: fix get_physical_address() #if 0 build error 2013-08-28 19:28:02 +02:00
helper.h target-mips: add support for CP0_Config5 2014-02-10 16:46:28 +01:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
mips-defs.h target-mips: add CPU definition for MIPS32R5 2014-02-10 16:45:53 +01:00
op_helper.c target-mips: add support for CP0_Config5 2014-02-10 16:46:28 +01:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate.c target-mips: add support for CP0_Config5 2014-02-10 16:46:28 +01:00
translate_init.c target-mips: add support for CP0_Config5 2014-02-10 16:46:28 +01:00