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By separating the sun4u IOMMU device into new sun4u_iommu.c and sun4m_iommu.h files we noticeably simplify apb.c whilst bringing sun4u in line with all the other IOMMU-supporting architectures. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
54 lines
1.2 KiB
C
54 lines
1.2 KiB
C
#ifndef PCI_HOST_APB_H
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#define PCI_HOST_APB_H
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#include "hw/sparc/sun4u_iommu.h"
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#define MAX_IVEC 0x40
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/* OBIO IVEC IRQs */
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#define OBIO_HDD_IRQ 0x20
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#define OBIO_NIC_IRQ 0x21
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#define OBIO_LPT_IRQ 0x22
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#define OBIO_FDD_IRQ 0x27
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#define OBIO_KBD_IRQ 0x29
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#define OBIO_MSE_IRQ 0x2a
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#define OBIO_SER_IRQ 0x2b
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#define TYPE_APB "pbm"
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#define APB_DEVICE(obj) \
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OBJECT_CHECK(APBState, (obj), TYPE_APB)
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typedef struct APBState {
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PCIHostState parent_obj;
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hwaddr special_base;
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hwaddr mem_base;
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MemoryRegion apb_config;
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MemoryRegion pci_config;
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MemoryRegion pci_mmio;
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MemoryRegion pci_ioport;
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uint64_t pci_irq_in;
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IOMMUState *iommu;
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PCIBridge *bridgeA;
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PCIBridge *bridgeB;
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uint32_t pci_control[16];
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uint32_t pci_irq_map[8];
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uint32_t pci_err_irq_map[4];
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uint32_t obio_irq_map[32];
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qemu_irq ivec_irqs[MAX_IVEC];
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unsigned int irq_request;
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uint32_t reset_control;
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unsigned int nr_resets;
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} APBState;
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typedef struct PBMPCIBridge {
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/*< private >*/
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PCIBridge parent_obj;
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} PBMPCIBridge;
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#define TYPE_PBM_PCI_BRIDGE "pbm-bridge"
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#define PBM_PCI_BRIDGE(obj) \
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OBJECT_CHECK(PBMPCIBridge, (obj), TYPE_PBM_PCI_BRIDGE)
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#endif
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