Peter Maydell 5cc7a54c2e Vector rotate support ... Signal handling support for NetBSD arm/aarch64 -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAl7WgZkdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8ZZwf9Flw0VHTBBzsZHPjL JVOdJsz8pnQLRDxk9JUo7D40xehpN1oE5mFCV5aFNMSz929r7OB5WfUHsyNpbms/ aCDz2ADRscBZ4xEZY9cxUYiNzq4fb3Hez64ibGbRm3uHU1C2pPNDRlFpL9aFQMCE elhn54hwOAZUZAAKszepClHGglPffijY5QU5VX6Gq6nmqEmCBlA8lkxMtaV/NRnS QfskDF4KvglGqGDCcKI2tfotu5Y9k3R4yh7Nzc2JnotbHk4WrNbhBl6r9KcdXddi uQng4J0zhBa1Kq4ENdpKgAqN/ZNVEbsFzev5aY77UD76cnxqbQQ7hfXl2gAORp6m Vy5lVw== =nRee -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200602' into staging Vector rotate support Signal handling support for NetBSD arm/aarch64 # gpg: Signature made Tue 02 Jun 2020 17:43:05 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200602: accel/tcg: Provide a NetBSD specific aarch64 cpu_signal_handler accel/tcg: Adjust cpu_signal_handler for NetBSD/arm tcg: Improve move ops in liveness_pass_2 target/s390x: Use tcg_gen_gvec_rotl{i,s,v} target/ppc: Use tcg_gen_gvec_rotlv tcg/ppc: Implement INDEX_op_rot[lr]v_vec tcg/aarch64: Implement INDEX_op_rotl{i,v}_vec tcg/i386: Implement INDEX_op_rotl{i,s,v}_vec tcg: Implement gvec support for rotate by scalar tcg: Remove expansion to shift by vector from do_shifts tcg: Implement gvec support for rotate by vector tcg: Implement gvec support for rotate by immediate Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-06-02 18:16:38 +01:00
..
alpha	accel/tcg: Relax va restrictions on 64-bit guests	2020-05-15 15:25:16 +01:00
arm	target/arm: Allow user-mode code to write CPSR.E via MSR	2020-05-21 22:05:27 +01:00
cris	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
hppa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
i386	i386: Fix x86_cpu_load_model() error API violation	2020-05-27 07:45:45 +02:00
lm32	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
m68k	target/m68k: implement opcode fetoxm1	2020-06-02 13:59:02 +02:00
microblaze	target/microblaze: monitor: Increase the number of registers reported	2020-05-14 16:01:02 +02:00
mips	target/mips: Support variable page size	2020-06-01 13:28:21 +02:00
moxie	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
nios2	x86 and machine queue for 5.0 soft freeze	2020-03-19 14:22:46 +00:00
openrisc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
ppc	target/ppc: Use tcg_gen_gvec_rotlv	2020-06-02 08:42:37 -07:00
riscv	target/riscv: Add a sifive-e34 cpu type	2020-04-29 13:16:37 -07:00
rx	target/rx/translate: Add missing fall through comment	2020-04-07 18:45:54 -07:00
s390x	target/s390x: Use tcg_gen_gvec_rotl{i,s,v}	2020-06-02 08:42:37 -07:00
sh4	gdbstub: Introduce gdb_get_float32() to get 32-bit float registers	2020-04-15 11:38:23 +01:00
sparc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
tilegx	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
tricore	target/tricore: Implement gdbstub	2020-06-01 16:55:13 +02:00
unicore32	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
xtensa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00