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https://github.com/Motorhead1991/qemu.git
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b2509acc60
Drop support for sequential OR and XOR, as the serial dependency is slower than loading the constant first. Let the register allocator handle such immediates by matching only what one insn can achieve. Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
39 lines
854 B
C
39 lines
854 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define S390 target-specific constraint sets.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
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* Each operand should be a sequence of constraint letters as defined by
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* tcg-target-con-str.h; the constraint combination is inclusive or.
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*/
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C_O0_I1(r)
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C_O0_I2(L, L)
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C_O0_I2(r, r)
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C_O0_I2(r, ri)
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C_O0_I2(v, r)
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C_O1_I1(r, L)
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C_O1_I1(r, r)
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C_O1_I1(v, r)
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C_O1_I1(v, v)
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C_O1_I1(v, vr)
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C_O1_I2(r, 0, ri)
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C_O1_I2(r, 0, rI)
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C_O1_I2(r, 0, rJ)
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C_O1_I2(r, r, ri)
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C_O1_I2(r, r, rJ)
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C_O1_I2(r, r, rK)
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C_O1_I2(r, rZ, r)
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C_O1_I2(v, v, r)
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C_O1_I2(v, v, v)
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C_O1_I3(v, v, v, v)
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C_O1_I4(r, r, ri, r, 0)
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C_O1_I4(r, r, ri, rI, 0)
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C_O2_I2(o, m, 0, r)
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C_O2_I2(o, m, r, r)
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C_O2_I3(o, m, 0, 1, r)
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C_O2_I4(r, r, 0, 1, rA, r)
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C_O2_I4(r, r, 0, 1, ri, r)
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C_O2_I4(r, r, 0, 1, r, r)
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