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8a669b8aae
Revertee3863b9d4anda08d60bc6c. The logic behind changing the system page size because of what the Loongson kernel "prefers" is flawed. In the Loongson-2E manual, section 5.5, it is clear that the cpu supports a 4k page size (along with many others). Similarly for the Loongson-3 series CPUs, the 4k page size is mentioned in the section 7.7 (PageMask Register). Therefore we must continue to support a 4k page size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250328175526.368121-2-richard.henderson@linaro.org> [PMD: Mention Loongson-3 series CPUs] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> (cherry picked from commitfca2817fdc) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
30 lines
580 B
C
30 lines
580 B
C
/*
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* MIPS cpu parameters for qemu.
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*
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* SPDX-License-Identifier: LGPL-2.0-or-later
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*/
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#ifndef MIPS_CPU_PARAM_H
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#define MIPS_CPU_PARAM_H
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#ifdef TARGET_MIPS64
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# define TARGET_LONG_BITS 64
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#else
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# define TARGET_LONG_BITS 32
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#endif
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#ifdef TARGET_ABI_MIPSN64
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#define TARGET_PHYS_ADDR_SPACE_BITS 48
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#define TARGET_VIRT_ADDR_SPACE_BITS 48
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#else
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#define TARGET_PHYS_ADDR_SPACE_BITS 40
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# ifdef CONFIG_USER_ONLY
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# define TARGET_VIRT_ADDR_SPACE_BITS 31
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# else
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#endif
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#define TARGET_PAGE_BITS 12
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#define TCG_GUEST_DEFAULT_MO (0)
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#endif
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