qemu/hw/intc
Jan Klötzke b056fae2cd hw/intc/arm_gic: fix spurious level triggered interrupts
On GICv2 and later, level triggered interrupts are pending when either
the interrupt line is asserted or the interrupt was made pending by a
GICD_ISPENDRn write. Making a level triggered interrupt pending by
software persists until either the interrupt is acknowledged or cleared
by writing GICD_ICPENDRn. As long as the interrupt line is asserted,
the interrupt is pending in any case.

This logic is transparently implemented in gic_test_pending() for
GICv1 and GICv2.  The function combines the "pending" irq_state flag
(used for edge triggered interrupts and software requests) and the
line status (tracked in the "level" field).  However, we also
incorrectly set the pending flag on a guest write to GICD_ISENABLERn
if the line of a level triggered interrupt was asserted.  This keeps
the interrupt pending even if the line is de-asserted after some
time.

This incorrect logic is a leftover of the initial 11MPCore GIC
implementation.  That handles things slightly differently to the
architected GICv1 and GICv2.  The 11MPCore TRM does not give a lot of
detail on the corner cases of its GIC's behaviour, and historically
we have not wanted to investigate exactly what it does in reality, so
QEMU's GIC model takes the approach of "retain our existing behaviour
for 11MPCore, and implement the architectural standard for later GIC
revisions".

On that basis, commit 8d999995e4 in 2013 is where we added the
"level-triggered interrupt with the line asserted" handling to
gic_test_pending(), and we deliberately kept the old behaviour of
gic_test_pending() for REV_11MPCORE.  That commit should have added
the "only if 11MPCore" condition to the setting of the pending bit on
writes to GICD_ISENABLERn, but forgot it.

Add the missing "if REV_11MPCORE" condition, so that our behaviour
on GICv1 and GICv2 matches the GIC architecture requirements.

Cc: qemu-stable@nongnu.org
Fixes: 8d999995e4 ("arm_gic: Fix GIC pending behavior")
Signed-off-by: Jan Klötzke <jan.kloetzke@kernkonzept.com>
Message-id: 20240911114826.3558302-1-jan.kloetzke@kernkonzept.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: expanded comment a little and converted to coding-style form;
 expanded commit message with the historical backstory]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 110684c9a6)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-09-14 19:29:07 +03:00
..
allwinner-a10-pic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
apic.c hw/intc/apic: fix memory leak 2024-03-09 18:51:45 +01:00
apic_common.c hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabled 2024-02-14 06:09:32 -05:00
arm_gic.c hw/intc/arm_gic: fix spurious level triggered interrupts 2024-09-14 19:29:07 +03:00
arm_gic_common.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
arm_gic_kvm.c migration: simplify blockers 2023-10-20 08:51:41 +02:00
arm_gicv2m.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
arm_gicv3.c hw/intc/arm_gicv3: Specify valid and impl in MemoryRegionOps 2022-03-07 13:16:50 +00:00
arm_gicv3_common.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled 2024-04-02 10:02:44 +01:00
arm_gicv3_cpuif_common.c hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c 2021-12-15 10:11:34 +00:00
arm_gicv3_dist.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
arm_gicv3_its.c hw/intc/arm_gicv3_its: Avoid shadowing variable in do_process_its_cmd() 2023-09-29 10:07:18 +02:00
arm_gicv3_its_common.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
arm_gicv3_its_kvm.c hw/intc/arm_gicv3: Include missing 'qemu/error-report.h' header 2023-12-19 17:57:44 +00:00
arm_gicv3_kvm.c migration: simplify blockers 2023-10-20 08:51:41 +02:00
arm_gicv3_redist.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
armv7m_nvic.c hw/intc/armv7m_nvic: add "num-prio-bits" property 2024-01-09 14:42:40 +00:00
aspeed_vic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
bcm2835_ic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
bcm2836_control.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
etraxfs_pic.c hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
exynos4210_combiner.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
exynos4210_gic.c Misc cleanups 2022-04-21 09:27:54 -07:00
gic_internal.h hw/intc/arm_gic: Drop GIC_BASE_IRQ macro 2018-09-25 15:13:24 +01:00
gicv3_internal.h hw/intc/arm_gicv3: Update ID and feature registers for GICv4 2022-04-22 14:44:53 +01:00
goldfish_pic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
grlib_irqmp.c hw/intc/grlib_irqmp: abort realize when ncpus value is out of range 2024-03-09 19:17:01 +01:00
heathrow_pic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
i8259.c hw/intc/i8259: Implement legacy LTIM Edge/Level Bank Select 2023-03-08 00:37:48 +01:00
i8259_common.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
imx_avic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
imx_gpcv2.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
intc.c intc: add an interface to gather statistics/informations on interrupt controllers 2016-10-04 10:00:25 +02:00
ioapic.c hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE update 2023-03-15 11:52:25 +01:00
ioapic_common.c hw/intc: Check @errp to handle the error of IOAPICCommonClass.realize() 2024-03-12 11:45:33 +01:00
ioapic_internal.h hw: Move ioapic*.h to intc/ 2023-02-27 22:29:01 +01:00
Kconfig hw/intc/Kconfig: Fix GIC settings when using "--without-default-devices" 2024-03-01 08:27:33 +01:00
kvm_irqcount.c hw/intc: Extract the IRQ counting functions into a separate file 2023-01-13 16:22:57 +01:00
loongarch_extioi.c hw/intc/loongarch_extioi: Fix interrupt routing update 2024-03-20 10:19:57 +08:00
loongarch_ipi.c hw/intc/loongson_ipi: Fix resource leak 2024-07-24 16:14:36 +03:00
loongarch_pch_msi.c hw/intc/loongarch_pch_msi: add irq number property 2023-01-06 10:54:20 +08:00
loongarch_pch_pic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
loongson_liointc.c hw/other: spelling fixes 2023-09-21 11:31:16 +03:00
m68k_irqc.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
meson.build meson: Replace softmmu_ss -> system_ss 2023-06-20 10:01:30 +02:00
mips_gic.c accel/tcg: Replace CPUState.env_ptr with cpu_env() 2023-10-04 11:03:54 -07:00
nios2_vic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
omap_intc.c hw/other: spelling fixes 2023-09-21 11:31:16 +03:00
ompic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
openpic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
openpic_kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
pl190.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
pnv_xive.c hw/other: spelling fixes 2023-09-21 11:31:16 +03:00
pnv_xive2.c ppc/xive: Use address_space routines to access the machine RAM 2023-09-06 11:19:33 +02:00
pnv_xive2_regs.h pnv/xive2: Add definition for the ESB cache configuration register 2023-06-10 10:19:24 -03:00
pnv_xive_regs.h ppc/xive: Handle END triggers between chips with MMIOs 2023-09-06 11:19:33 +02:00
ppc-uic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
realview_gic.c error: Eliminate error_propagate() with Coccinelle, part 1 2020-07-10 15:18:08 +02:00
riscv_aclint.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
riscv_aplic.c hw/intc/riscv_aplic: APLICs should add child earlier than realize 2024-06-05 13:00:13 +03:00
riscv_imsic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
rx_icu.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
s390_flic.c system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
s390_flic_kvm.c hw/intc/s390_flic: Consolidate the use of device_class_set_parent_realize() 2024-02-13 10:59:25 +03:00
sh_intc.c hw/intc/sh_intc: Remove unneeded local variable initialisers 2021-10-30 18:39:37 +02:00
sifive_plic.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
slavio_intctl.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
spapr_xive.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
spapr_xive_kvm.c hw/other: spelling fixes 2023-09-21 11:31:16 +03:00
trace-events i386/tcg: implement x2APIC registers MSR access 2024-02-14 06:09:32 -05:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
vgic_common.h intc/gic: Extract some reusable vGIC code 2015-09-24 01:29:36 +01:00
xics.c hw/intc/xics: Include missing 'cpu.h' header 2024-01-30 21:20:20 +03:00
xics_kvm.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
xics_pnv.c non-virt: Fix Lesser GPL version number 2020-11-15 16:38:24 +01:00
xics_spapr.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xilinx_intc.c hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic' 2023-01-12 17:15:09 +00:00
xive.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
xive2.c hw/other: spelling fixes 2023-09-21 11:31:16 +03:00
xlnx-pmu-iomod-intc.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00
xlnx-zynqmp-ipi.c hw/intc: Constify VMState 2023-12-29 11:17:30 +11:00