TANG Tiancheng 658384884a target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI ... RV32 OpenSBI need a fw_dynamic_info parameter with 32-bit fields instead of target_ulong. In RV64 QEMU, target_ulong is 64. So it is not right for booting RV32 OpenSBI. We create a fw_dynmaic_info32 struct for this purpose. Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240919055048.562-2-zhiwei_liu@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2024-10-30 11:22:07 +10:00
..
boot.c	target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI	2024-10-30 11:22:07 +10:00
Kconfig	hw/char: Extract serial-mm	2024-10-03 19:33:23 +02:00
meson.build	meson: pick libfdt from common_ss when building target-specific files	2024-05-10 15:45:15 +02:00
microchip_pfsoc.c	hw/riscv: Respect firmware ELF entry point	2024-10-02 15:11:51 +10:00
numa.c	hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix()	2024-02-09 20:43:14 +10:00
opentitan.c	hw/riscv: Respect firmware ELF entry point	2024-10-02 15:11:51 +10:00
riscv_hart.c	hw/riscv: hart: Add a new 'resetvec' property	2020-09-09 15:54:18 -07:00
shakti_c.c	hw/riscv: Respect firmware ELF entry point	2024-10-02 15:11:51 +10:00
sifive_e.c	hw: Remove unused inclusion of hw/char/serial.h	2024-10-03 19:33:23 +02:00
sifive_u.c	target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI	2024-10-30 11:22:07 +10:00
spike.c	hw/riscv: Respect firmware ELF entry point	2024-10-02 15:11:51 +10:00
virt-acpi-build.c	hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART	2024-07-22 20:15:42 -04:00
virt.c	* pc: Add a description for the i8042 property	2024-10-04 19:28:37 +01:00