Daniel Henrique Barboza bab2be1923 target/riscv/cpu.c: add 'ssstrict' to riscv, isa ... 'ssstrict' is a RVA23 profile-defined extension defined as follows: "No non-conforming extensions are present. Attempts to execute unimplemented opcodes or access unimplemented CSRs in the standard or reserved encoding spaces raises an illegal instruction exception that results in a contained trap to the supervisor-mode trap handler." In short, we need to throw an exception when accessing unimplemented CSRs or opcodes. We do that, so let's advertise it. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20250529202315.1684198-3-dbarboza@ventanamicro.com> Message-ID: <20250604174329.1147549-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2025-07-04 21:09:48 +10:00
..
acpi	target/riscv/cpu.c: add 'ssstrict' to riscv, isa	2025-07-04 21:09:48 +10:00
hex-loader	tests: Move tests/hex-loader-check-data/ to tests/data/hex-loader/	2018-11-05 13:23:46 -05:00
qobject	target/cris: Remove the deprecated CRIS target	2024-09-13 20:11:13 +02:00
smbios	tests: smbios: add test for legacy mode CLI options	2024-03-18 08:42:45 -04:00
uefi-boot-images	tests/data/uefi-boot-images: Add ISO image for LoongArch system	2025-06-01 06:38:53 -04:00
test-qga-config	qga: Replace 'blacklist' command line and config file options by 'block-rpcs'	2022-09-20 12:37:00 +02:00
test-qga-os-release	test-qga: add test for guest-get-osinfo	2017-07-18 05:49:01 -05:00