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https://github.com/Motorhead1991/qemu.git
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Use the same value for all targets. Rename TARGET_INSN_START_WORDS and do not depend on TARGET_INSN_START_EXTRA_WORDS. Remove TCGContext.insn_start_words. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
192 lines
6.5 KiB
C
192 lines
6.5 KiB
C
/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* DEF(name, oargs, iargs, cargs, flags)
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*/
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/* predefined ops */
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DEF(discard, 1, 0, 0, TCG_OPF_NOT_PRESENT)
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DEF(set_label, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
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/* variable number of parameters */
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DEF(call, 0, 0, 3, TCG_OPF_CALL_CLOBBER | TCG_OPF_NOT_PRESENT)
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DEF(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
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DEF(brcond, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH | TCG_OPF_INT)
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DEF(mb, 0, 0, 1, TCG_OPF_NOT_PRESENT)
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DEF(mov, 1, 1, 0, TCG_OPF_INT | TCG_OPF_NOT_PRESENT)
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DEF(add, 1, 2, 0, TCG_OPF_INT)
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DEF(and, 1, 2, 0, TCG_OPF_INT)
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DEF(andc, 1, 2, 0, TCG_OPF_INT)
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DEF(bswap16, 1, 1, 1, TCG_OPF_INT)
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DEF(bswap32, 1, 1, 1, TCG_OPF_INT)
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DEF(bswap64, 1, 1, 1, TCG_OPF_INT)
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DEF(clz, 1, 2, 0, TCG_OPF_INT)
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DEF(ctpop, 1, 1, 0, TCG_OPF_INT)
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DEF(ctz, 1, 2, 0, TCG_OPF_INT)
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DEF(deposit, 1, 2, 2, TCG_OPF_INT)
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DEF(divs, 1, 2, 0, TCG_OPF_INT)
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DEF(divs2, 2, 3, 0, TCG_OPF_INT)
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DEF(divu, 1, 2, 0, TCG_OPF_INT)
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DEF(divu2, 2, 3, 0, TCG_OPF_INT)
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DEF(eqv, 1, 2, 0, TCG_OPF_INT)
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DEF(extract, 1, 1, 2, TCG_OPF_INT)
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DEF(extract2, 1, 2, 1, TCG_OPF_INT)
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DEF(ld8u, 1, 1, 1, TCG_OPF_INT)
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DEF(ld8s, 1, 1, 1, TCG_OPF_INT)
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DEF(ld16u, 1, 1, 1, TCG_OPF_INT)
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DEF(ld16s, 1, 1, 1, TCG_OPF_INT)
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DEF(ld32u, 1, 1, 1, TCG_OPF_INT)
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DEF(ld32s, 1, 1, 1, TCG_OPF_INT)
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DEF(ld, 1, 1, 1, TCG_OPF_INT)
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DEF(movcond, 1, 4, 1, TCG_OPF_INT)
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DEF(mul, 1, 2, 0, TCG_OPF_INT)
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DEF(muls2, 2, 2, 0, TCG_OPF_INT)
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DEF(mulsh, 1, 2, 0, TCG_OPF_INT)
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DEF(mulu2, 2, 2, 0, TCG_OPF_INT)
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DEF(muluh, 1, 2, 0, TCG_OPF_INT)
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DEF(nand, 1, 2, 0, TCG_OPF_INT)
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DEF(neg, 1, 1, 0, TCG_OPF_INT)
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DEF(negsetcond, 1, 2, 1, TCG_OPF_INT)
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DEF(nor, 1, 2, 0, TCG_OPF_INT)
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DEF(not, 1, 1, 0, TCG_OPF_INT)
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DEF(or, 1, 2, 0, TCG_OPF_INT)
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DEF(orc, 1, 2, 0, TCG_OPF_INT)
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DEF(rems, 1, 2, 0, TCG_OPF_INT)
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DEF(remu, 1, 2, 0, TCG_OPF_INT)
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DEF(rotl, 1, 2, 0, TCG_OPF_INT)
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DEF(rotr, 1, 2, 0, TCG_OPF_INT)
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DEF(sar, 1, 2, 0, TCG_OPF_INT)
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DEF(setcond, 1, 2, 1, TCG_OPF_INT)
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DEF(sextract, 1, 1, 2, TCG_OPF_INT)
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DEF(shl, 1, 2, 0, TCG_OPF_INT)
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DEF(shr, 1, 2, 0, TCG_OPF_INT)
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DEF(st8, 0, 2, 1, TCG_OPF_INT)
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DEF(st16, 0, 2, 1, TCG_OPF_INT)
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DEF(st32, 0, 2, 1, TCG_OPF_INT)
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DEF(st, 0, 2, 1, TCG_OPF_INT)
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DEF(sub, 1, 2, 0, TCG_OPF_INT)
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DEF(xor, 1, 2, 0, TCG_OPF_INT)
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DEF(addco, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_OUT)
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DEF(addc1o, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_OUT)
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DEF(addci, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_IN)
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DEF(addcio, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_IN | TCG_OPF_CARRY_OUT)
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DEF(subbo, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_OUT)
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DEF(subb1o, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_OUT)
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DEF(subbi, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_IN)
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DEF(subbio, 1, 2, 0, TCG_OPF_INT | TCG_OPF_CARRY_IN | TCG_OPF_CARRY_OUT)
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DEF(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END | TCG_OPF_COND_BRANCH)
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DEF(setcond2_i32, 1, 4, 1, 0)
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/* size changing ops */
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DEF(ext_i32_i64, 1, 1, 0, 0)
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DEF(extu_i32_i64, 1, 1, 0, 0)
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DEF(extrl_i64_i32, 1, 1, 0, 0)
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DEF(extrh_i64_i32, 1, 1, 0, 0)
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#define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2)
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DEF(insn_start, 0, 0, DATA64_ARGS * INSN_START_WORDS, TCG_OPF_NOT_PRESENT)
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DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
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DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
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DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_EXIT | TCG_OPF_BB_END)
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DEF(plugin_cb, 0, 0, 1, TCG_OPF_NOT_PRESENT)
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DEF(plugin_mem_cb, 0, 1, 1, TCG_OPF_NOT_PRESENT)
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DEF(qemu_ld, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_INT)
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DEF(qemu_st, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_INT)
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DEF(qemu_ld2, 2, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_INT)
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DEF(qemu_st2, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_INT)
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/* Host vector support. */
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DEF(mov_vec, 1, 1, 0, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT)
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DEF(dup_vec, 1, 1, 0, TCG_OPF_VECTOR)
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DEF(dup2_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(ld_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(st_vec, 0, 2, 1, TCG_OPF_VECTOR)
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DEF(dupm_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(add_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(sub_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(mul_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(neg_vec, 1, 1, 0, TCG_OPF_VECTOR)
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DEF(abs_vec, 1, 1, 0, TCG_OPF_VECTOR)
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DEF(ssadd_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(usadd_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(sssub_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(ussub_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(smin_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(umin_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(smax_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(umax_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(and_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(or_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(xor_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(andc_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(orc_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(nand_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(nor_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(eqv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(not_vec, 1, 1, 0, TCG_OPF_VECTOR)
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DEF(shli_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(shri_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(sari_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(rotli_vec, 1, 1, 1, TCG_OPF_VECTOR)
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DEF(shls_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(shrs_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(sars_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(rotls_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(shlv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(shrv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(sarv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(rotlv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(rotrv_vec, 1, 2, 0, TCG_OPF_VECTOR)
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DEF(cmp_vec, 1, 2, 1, TCG_OPF_VECTOR)
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DEF(bitsel_vec, 1, 3, 0, TCG_OPF_VECTOR)
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DEF(cmpsel_vec, 1, 4, 1, TCG_OPF_VECTOR)
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DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT)
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#include "tcg-target-opc.h.inc"
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#undef DATA64_ARGS
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#undef DEF
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