qemu/fpu
Peter Maydell a71492f726 target/mips: Set FloatInfZeroNaNRule explicitly
Set the FloatInfZeroNaNRule explicitly for the MIPS target,
so we can remove the ifdef from pickNaNMulAdd().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-9-peter.maydell@linaro.org
2024-12-11 15:30:54 +00:00
..
meson.build meson: Split out fpu/meson.build 2021-06-11 09:26:28 -07:00
softfloat-parts-addsub.c.inc softfloat: Move addsub_floats to softfloat-parts.c.inc 2021-05-16 07:13:51 -05:00
softfloat-parts.c.inc fpu: Check for default_nan_mode before calling pickNaNMulAdd 2024-12-11 15:30:53 +00:00
softfloat-specialize.c.inc target/mips: Set FloatInfZeroNaNRule explicitly 2024-12-11 15:30:54 +00:00
softfloat.c fpu: Handle m68k extended precision denormals properly 2023-09-16 14:57:16 +00:00