qemu/target
Frédéric Pétrot a2f827ff4f target/riscv: accessors to registers upper part and 128-bit load/store
Get function to retrieve the 64 top bits of a register, stored in the gprh
field of the cpu state. Set function that writes the 128-bit value at once.
The access to the gprh field can not be protected at compile time to make
sure it is accessed only in the 128-bit version of the processor because we
have no way to indicate that the misa_mxl_max field is const.

The 128-bit ISA adds ldu, lq and sq. We provide support for these
instructions. Note that (a) we compute only 64-bit addresses to actually
access memory, cowardly utilizing the existing address translation mechanism
of QEMU, and (b) we assume for now little-endian memory accesses.

Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Co-authored-by: Fabien Portas <fabien.portas@grenoble-inp.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220106210108.138226-10-frederic.petrot@univ-grenoble-alpes.fr
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-08 15:46:10 +10:00
..
alpha exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
arm exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
avr target/avr: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
cris exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
hexagon target/hexagon/cpu.h: don't include qemu-common.h 2021-12-15 10:35:26 +00:00
hppa exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
i386 exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
m68k exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
microblaze target/microblaze: Do not set MO_ALIGN for user-only 2021-11-02 07:00:52 -04:00
mips exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
nios2 linux-user/nios2: Map a real kuser page 2022-01-06 11:40:52 +01:00
openrisc target/openrisc: Make openrisc_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
ppc exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
riscv target/riscv: accessors to registers upper part and 128-bit load/store 2022-01-08 15:46:10 +10:00
rx target/rx/cpu.h: Don't include qemu-common.h 2021-12-15 10:35:26 +00:00
s390x exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
sh4 exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
sparc exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
tricore exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
xtensa exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00