Paolo Bonzini 20140a82c6 target/i386: add MDS-NO feature ... Microarchitectural Data Sampling is a hardware vulnerability which allows unprivileged speculative access to data which is available in various CPU internal buffers. Some Intel processors use the ARCH_CAP_MDS_NO bit in the IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable, make it available to guests. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20190516185320.28340-1-pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>		2019-05-21 15:39:05 -03:00
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alpha	target/alpha: Fix user-only floating-point exceptions	2019-05-19 07:30:03 -07:00
arm	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
cris	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
hppa	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
i386	target/i386: add MDS-NO feature	2019-05-21 15:39:05 -03:00
lm32	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
m68k	code cleanup, switch to transaction_failed hook	2019-05-17 10:28:23 +01:00
microblaze	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
mips	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
moxie	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
nios2	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
openrisc	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
ppc	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
riscv	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
s390x	s390x update:	2019-05-21 16:30:13 +01:00
sh4	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
sparc	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
tilegx	target/tilegx: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
tricore	Add CPUClass::tlb_fill.	2019-05-16 13:15:08 +01:00
unicore32	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-10 11:12:50 -07:00
xtensa	target/xtensa: SR reorganization and options for modern cores	2019-05-21 10:44:21 +01:00