qemu/accel
Tony Nguyen a26fc6f515 cputlb: Byte swap memory transaction attribute
Notice new attribute, byte swap, and force the transaction through the
memory slow path.

Required by architectures that can invert endianness of memory
transaction, e.g. SPARC64 has the Invert Endian TTE bit.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <2a10a1f1c00a894af1212c8f68ef09c2966023c1.1566466906.git.tony.nguyen@bt.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-09-03 08:30:39 -07:00
..
kvm sysemu: Split sysemu/runstate.h off sysemu/sysemu.h 2019-08-16 13:37:36 +02:00
stubs Clean up inclusion of exec/cpu-common.h 2019-08-16 13:31:52 +02:00
tcg cputlb: Byte swap memory transaction attribute 2019-09-03 08:30:39 -07:00
accel.c accel: Remove unused AccelClass::available field 2019-05-02 16:56:33 +02:00
Makefile.objs qtest: Don't compile qtest accel on non-POSIX systems 2019-05-02 16:56:33 +02:00
qtest.c qtest: Don't compile qtest accel on non-POSIX systems 2019-05-02 16:56:33 +02:00