qemu/docs/system/riscv
Sebastian Huber dd07ab1121 hw/riscv: microchip_pfsoc: Rework documentation
Mention that running the HSS no longer works.  Document the changed boot
options.  Reorder documentation blocks.  Update URLs.

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250319061342.26435-7-sebastian.huber@embedded-brains.de>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-05-19 13:30:24 +10:00
..
microblaze-v-generic.rst hw/riscv: Add Microblaze V generic board 2024-12-20 11:22:47 +10:00
microchip-icicle-kit.rst hw/riscv: microchip_pfsoc: Rework documentation 2025-05-19 13:30:24 +10:00
shakti-c.rst Fix some typos in documentation (found by codespell) 2021-11-22 15:02:38 +01:00
sifive_u.rst docs/system/riscv: sifive_u: Update S-mode U-Boot image build instructions 2024-01-10 18:47:47 +10:00
virt.rst docs: update riscv/virt.rst with kernel-irqchip=split support 2024-12-20 11:22:47 +10:00