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9d3f7108bc
Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function to handle this detail instead of hardcoding it in the boards. Ideally we would bake this logic inside riscv_find_and_load_firmware(), or even create a riscv_load_default_firmware(), but at this moment we cannot infer whether the machine is running 32 or 64 bits without accessing RISCVHartArrayState, which in turn can't be accessed via the common code from boot.c. In the end we would exchange 'firmware_name' for a flag with riscv_is_32bit(), which isn't much better than what we already have today. Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Signed-off-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20221221182300.307900-6-dbarboza@ventanamicro.com> Message-Id: <20221229091828.1945072-11-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
62 lines
2.8 KiB
C
62 lines
2.8 KiB
C
/*
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* QEMU RISC-V Boot Helper
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*
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* Copyright (c) 2017 SiFive, Inc.
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* Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef RISCV_BOOT_H
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#define RISCV_BOOT_H
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#include "exec/cpu-defs.h"
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#include "hw/loader.h"
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#include "hw/riscv/riscv_hart.h"
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#define RISCV32_BIOS_BIN "opensbi-riscv32-generic-fw_dynamic.bin"
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#define RISCV64_BIOS_BIN "opensbi-riscv64-generic-fw_dynamic.bin"
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bool riscv_is_32bit(RISCVHartArrayState *harts);
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char *riscv_plic_hart_config_string(int hart_count);
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target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts,
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target_ulong firmware_end_addr);
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target_ulong riscv_find_and_load_firmware(MachineState *machine,
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const char *default_machine_firmware,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb);
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const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
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target_ulong riscv_load_firmware(const char *firmware_filename,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb);
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target_ulong riscv_load_kernel(const char *kernel_filename,
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target_ulong firmware_end_addr,
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symbol_fn_t sym_cb);
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hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
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uint64_t kernel_entry, hwaddr *start);
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uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt);
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void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
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hwaddr saddr,
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hwaddr rom_base, hwaddr rom_size,
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uint64_t kernel_entry,
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uint64_t fdt_load_addr);
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void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base,
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hwaddr rom_size,
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uint32_t reset_vec_size,
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uint64_t kernel_entry);
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void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr);
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void riscv_setup_firmware_boot(MachineState *machine);
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#endif /* RISCV_BOOT_H */
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