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Since the kernel does not check the interleave capability, a 3-way, 6-way, 12-way or 16-way region can be create normally. Applications can access the memory of 16-way region normally because qemu can convert hpa to dpa correctly for the power of 2 interleave ways, after kernel implementing the check, this kind of region will not be created any more. For non power of 2 interleave ways, applications could not access the memory normally and may occur some unexpected behaviors, such as segmentation fault. So implements this feature is needed. Link: https://lore.kernel.org/linux-cxl/3e84b919-7631-d1db-3e1d-33000f3f3868@fujitsu.com/ Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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| .. | ||
| cxl_type3.c | ||
| cxl_type3_stubs.c | ||
| Kconfig | ||
| memory-device-stubs.c | ||
| memory-device.c | ||
| meson.build | ||
| npcm7xx_mc.c | ||
| nvdimm.c | ||
| pc-dimm.c | ||
| sparse-mem.c | ||
| trace-events | ||
| trace.h | ||