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Our BCM2836 type is really a generic one that can be any of the bcm283x family. Rename it accordingly. We change only the names which are visible via the header file to the rest of the QEMU code, leaving private function names in bcm2836.c as they are. This is a preliminary to making bcm283x be an abstract parent class to specific types for the bcm2836 and bcm2837. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180313153458.26822-6-peter.maydell@linaro.org
180 lines
6 KiB
C
180 lines
6 KiB
C
/*
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* Raspberry Pi emulation (c) 2012 Gregory Estrade
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* Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
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*
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* Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
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* Written by Andrew Baumann
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*
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* This code is licensed under the GNU GPLv2 and later.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/arm/bcm2836.h"
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#include "hw/arm/raspi_platform.h"
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#include "hw/sysbus.h"
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#include "exec/address-spaces.h"
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/* Peripheral base address seen by the CPU */
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#define BCM2836_PERI_BASE 0x3F000000
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/* "QA7" (Pi2) interrupt controller and mailboxes etc. */
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#define BCM2836_CONTROL_BASE 0x40000000
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static void bcm2836_init(Object *obj)
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{
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BCM283XState *s = BCM283X(obj);
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object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL);
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object_property_add_child(obj, "control", OBJECT(&s->control), NULL);
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qdev_set_parent_bus(DEVICE(&s->control), sysbus_get_default());
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object_initialize(&s->peripherals, sizeof(s->peripherals),
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TYPE_BCM2835_PERIPHERALS);
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object_property_add_child(obj, "peripherals", OBJECT(&s->peripherals),
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&error_abort);
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object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
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"board-rev", &error_abort);
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object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
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"vcram-size", &error_abort);
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qdev_set_parent_bus(DEVICE(&s->peripherals), sysbus_get_default());
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}
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static void bcm2836_realize(DeviceState *dev, Error **errp)
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{
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BCM283XState *s = BCM283X(dev);
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Object *obj;
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Error *err = NULL;
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int n;
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/* common peripherals from bcm2835 */
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obj = OBJECT(dev);
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for (n = 0; n < BCM283X_NCPUS; n++) {
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object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
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s->cpu_type);
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object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
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&error_abort);
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}
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obj = object_property_get_link(OBJECT(dev), "ram", &err);
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if (obj == NULL) {
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error_setg(errp, "%s: required ram link not found: %s",
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__func__, error_get_pretty(err));
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return;
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}
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object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_bool(OBJECT(&s->peripherals), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
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"sd-bus", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
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BCM2836_PERI_BASE, 1);
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/* bcm2836 interrupt controller (and mailboxes, etc.) */
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object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, BCM2836_CONTROL_BASE);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
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qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
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qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
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for (n = 0; n < BCM283X_NCPUS; n++) {
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/* Mirror bcm2836, which has clusterid set to 0xf
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* TODO: this should be converted to a property of ARM_CPU
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*/
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s->cpus[n].mp_affinity = 0xF00 | n;
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/* set periphbase/CBAR value for CPU-local registers */
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object_property_set_int(OBJECT(&s->cpus[n]),
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BCM2836_PERI_BASE + MCORE_OFFSET,
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"reset-cbar", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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/* start powered off if not enabled */
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object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus,
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"start-powered-off", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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/* Connect irq/fiq outputs from the interrupt controller. */
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qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
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qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ));
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qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
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qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ));
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/* Connect timers from the CPU to the interrupt controller */
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
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}
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}
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static Property bcm2836_props[] = {
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DEFINE_PROP_STRING("cpu-type", BCM283XState, cpu_type),
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DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
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BCM283X_NCPUS),
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DEFINE_PROP_END_OF_LIST()
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};
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static void bcm2836_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->props = bcm2836_props;
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dc->realize = bcm2836_realize;
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}
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static const TypeInfo bcm2836_type_info = {
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.name = TYPE_BCM283X,
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.parent = TYPE_DEVICE,
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.instance_size = sizeof(BCM283XState),
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.instance_init = bcm2836_init,
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.class_init = bcm2836_class_init,
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};
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static void bcm2836_register_types(void)
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{
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type_register_static(&bcm2836_type_info);
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}
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type_init(bcm2836_register_types)
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