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https://github.com/Motorhead1991/qemu.git
synced 2025-07-27 04:13:53 -06:00

- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= =cjz8 -----END PGP SIGNATURE----- Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging Accel & Exec patch queue - Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ... Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c Apply sysemu header path changes to not in the pull request. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
285 lines
8.5 KiB
C
285 lines
8.5 KiB
C
/*
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* Non-Volatile Dual In-line Memory Module Virtualization Implementation
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*
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* Copyright(C) 2015 Intel Corporation.
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*
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* Author:
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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*
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* Currently, it only supports PMEM Virtualization.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#include "qemu/osdep.h"
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#include "qemu/module.h"
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#include "qemu/pmem.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "hw/mem/nvdimm.h"
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#include "hw/qdev-properties.h"
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#include "hw/mem/memory-device.h"
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#include "system/hostmem.h"
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static void nvdimm_get_label_size(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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uint64_t value = nvdimm->label_size;
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visit_type_size(v, name, &value, errp);
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}
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static void nvdimm_set_label_size(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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uint64_t value;
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if (nvdimm->nvdimm_mr) {
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error_setg(errp, "cannot change property value");
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return;
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}
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if (!visit_type_size(v, name, &value, errp)) {
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return;
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}
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if (value < MIN_NAMESPACE_LABEL_SIZE) {
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error_setg(errp, "Property '%s.%s' (0x%" PRIx64 ") is required"
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" at least 0x%lx", object_get_typename(obj), name, value,
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MIN_NAMESPACE_LABEL_SIZE);
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return;
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}
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nvdimm->label_size = value;
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}
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static void nvdimm_get_uuid(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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char *value = NULL;
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value = qemu_uuid_unparse_strdup(&nvdimm->uuid);
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visit_type_str(v, name, &value, errp);
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g_free(value);
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}
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static void nvdimm_set_uuid(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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char *value;
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if (!visit_type_str(v, name, &value, errp)) {
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return;
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}
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if (qemu_uuid_parse(value, &nvdimm->uuid) != 0) {
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error_setg(errp, "Property '%s.%s' has invalid value",
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object_get_typename(obj), name);
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}
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g_free(value);
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}
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static void nvdimm_init(Object *obj)
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{
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object_property_add(obj, NVDIMM_LABEL_SIZE_PROP, "int",
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nvdimm_get_label_size, nvdimm_set_label_size, NULL,
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NULL);
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object_property_add(obj, NVDIMM_UUID_PROP, "QemuUUID", nvdimm_get_uuid,
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nvdimm_set_uuid, NULL, NULL);
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}
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static void nvdimm_finalize(Object *obj)
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{
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NVDIMMDevice *nvdimm = NVDIMM(obj);
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g_free(nvdimm->nvdimm_mr);
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}
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static void nvdimm_prepare_memory_region(NVDIMMDevice *nvdimm, Error **errp)
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{
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PCDIMMDevice *dimm = PC_DIMM(nvdimm);
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uint64_t align, pmem_size, size;
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MemoryRegion *mr;
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g_assert(!nvdimm->nvdimm_mr);
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if (!dimm->hostmem) {
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error_setg(errp, "'" PC_DIMM_MEMDEV_PROP "' property must be set");
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return;
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}
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mr = host_memory_backend_get_memory(dimm->hostmem);
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align = memory_region_get_alignment(mr);
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size = memory_region_size(mr);
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pmem_size = size - nvdimm->label_size;
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nvdimm->label_data = memory_region_get_ram_ptr(mr) + pmem_size;
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pmem_size = QEMU_ALIGN_DOWN(pmem_size, align);
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if (size <= nvdimm->label_size || !pmem_size) {
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HostMemoryBackend *hostmem = dimm->hostmem;
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error_setg(errp, "the size of memdev %s (0x%" PRIx64 ") is too "
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"small to contain nvdimm label (0x%" PRIx64 ") and "
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"aligned PMEM (0x%" PRIx64 ")",
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object_get_canonical_path_component(OBJECT(hostmem)),
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memory_region_size(mr), nvdimm->label_size, align);
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return;
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}
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if (!nvdimm->unarmed && memory_region_is_rom(mr)) {
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HostMemoryBackend *hostmem = dimm->hostmem;
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error_setg(errp, "'unarmed' property must be 'on' since memdev %s "
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"is read-only",
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object_get_canonical_path_component(OBJECT(hostmem)));
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return;
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}
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if (memory_region_is_rom(mr)) {
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nvdimm->readonly = true;
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}
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nvdimm->nvdimm_mr = g_new(MemoryRegion, 1);
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memory_region_init_alias(nvdimm->nvdimm_mr, OBJECT(dimm),
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"nvdimm-memory", mr, 0, pmem_size);
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memory_region_set_nonvolatile(nvdimm->nvdimm_mr, true);
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nvdimm->nvdimm_mr->align = align;
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}
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static MemoryRegion *nvdimm_md_get_memory_region(MemoryDeviceState *md,
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Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(md);
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Error *local_err = NULL;
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if (!nvdimm->nvdimm_mr) {
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nvdimm_prepare_memory_region(nvdimm, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return NULL;
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}
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}
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return nvdimm->nvdimm_mr;
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}
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static void nvdimm_realize(PCDIMMDevice *dimm, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(dimm);
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NVDIMMClass *ndc = NVDIMM_GET_CLASS(nvdimm);
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if (!nvdimm->nvdimm_mr) {
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nvdimm_prepare_memory_region(nvdimm, errp);
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}
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if (ndc->realize) {
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ndc->realize(nvdimm, errp);
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}
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}
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static void nvdimm_unrealize(PCDIMMDevice *dimm)
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{
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NVDIMMDevice *nvdimm = NVDIMM(dimm);
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NVDIMMClass *ndc = NVDIMM_GET_CLASS(nvdimm);
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if (ndc->unrealize) {
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ndc->unrealize(nvdimm);
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}
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}
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/*
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* the caller should check the input parameters before calling
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* label read/write functions.
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*/
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static void nvdimm_validate_rw_label_data(NVDIMMDevice *nvdimm, uint64_t size,
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uint64_t offset, bool is_write)
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{
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assert((nvdimm->label_size >= size + offset) && (offset + size > offset));
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assert(!is_write || !nvdimm->readonly);
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}
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static void nvdimm_read_label_data(NVDIMMDevice *nvdimm, void *buf,
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uint64_t size, uint64_t offset)
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{
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nvdimm_validate_rw_label_data(nvdimm, size, offset, false);
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memcpy(buf, nvdimm->label_data + offset, size);
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}
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static void nvdimm_write_label_data(NVDIMMDevice *nvdimm, const void *buf,
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uint64_t size, uint64_t offset)
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{
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MemoryRegion *mr;
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PCDIMMDevice *dimm = PC_DIMM(nvdimm);
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bool is_pmem = object_property_get_bool(OBJECT(dimm->hostmem),
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"pmem", NULL);
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uint64_t backend_offset;
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nvdimm_validate_rw_label_data(nvdimm, size, offset, true);
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if (!is_pmem) {
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memcpy(nvdimm->label_data + offset, buf, size);
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} else {
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pmem_memcpy_persist(nvdimm->label_data + offset, buf, size);
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}
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mr = host_memory_backend_get_memory(dimm->hostmem);
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backend_offset = memory_region_size(mr) - nvdimm->label_size + offset;
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memory_region_set_dirty(mr, backend_offset, size);
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}
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static const Property nvdimm_properties[] = {
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DEFINE_PROP_BOOL(NVDIMM_UNARMED_PROP, NVDIMMDevice, unarmed, false),
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};
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static void nvdimm_class_init(ObjectClass *oc, void *data)
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{
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PCDIMMDeviceClass *ddc = PC_DIMM_CLASS(oc);
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MemoryDeviceClass *mdc = MEMORY_DEVICE_CLASS(oc);
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NVDIMMClass *nvc = NVDIMM_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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ddc->realize = nvdimm_realize;
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ddc->unrealize = nvdimm_unrealize;
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mdc->get_memory_region = nvdimm_md_get_memory_region;
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device_class_set_props(dc, nvdimm_properties);
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nvc->read_label_data = nvdimm_read_label_data;
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nvc->write_label_data = nvdimm_write_label_data;
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set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
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}
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static const TypeInfo nvdimm_info = {
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.name = TYPE_NVDIMM,
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.parent = TYPE_PC_DIMM,
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.class_size = sizeof(NVDIMMClass),
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.class_init = nvdimm_class_init,
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.instance_size = sizeof(NVDIMMDevice),
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.instance_init = nvdimm_init,
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.instance_finalize = nvdimm_finalize,
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};
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static void nvdimm_register_types(void)
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{
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type_register_static(&nvdimm_info);
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}
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type_init(nvdimm_register_types)
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