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- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= =cjz8 -----END PGP SIGNATURE----- Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging Accel & Exec patch queue - Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ... Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c Apply sysemu header path changes to not in the pull request. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
161 lines
5 KiB
C
161 lines
5 KiB
C
/*
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* QEMU emulation of common X86 IOMMU
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*
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* Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/sysbus.h"
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#include "hw/i386/x86-iommu.h"
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#include "hw/qdev-properties.h"
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#include "hw/i386/pc.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "system/kvm.h"
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void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
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iec_notify_fn fn, void *data)
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{
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IEC_Notifier *notifier = g_new0(IEC_Notifier, 1);
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notifier->iec_notify = fn;
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notifier->private = data;
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QLIST_INSERT_HEAD(&iommu->iec_notifiers, notifier, list);
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}
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void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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uint32_t index, uint32_t mask)
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{
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IEC_Notifier *notifier;
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trace_x86_iommu_iec_notify(global, index, mask);
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QLIST_FOREACH(notifier, &iommu->iec_notifiers, list) {
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if (notifier->iec_notify) {
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notifier->iec_notify(notifier->private, global,
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index, mask);
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}
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}
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}
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/* Generate one MSI message from VTDIrq info */
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void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *msg_out)
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{
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X86IOMMU_MSIMessage msg = {};
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/* Generate address bits */
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msg.dest_mode = irq->dest_mode;
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msg.redir_hint = irq->redir_hint;
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msg.dest = irq->dest;
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msg.__addr_hi = irq->dest & 0xffffff00;
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msg.__addr_head = 0xfee;
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/* Keep this from original MSI address bits */
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msg.__not_used = irq->msi_addr_last_bits;
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/* Generate data bits */
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msg.vector = irq->vector;
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msg.delivery_mode = irq->delivery_mode;
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msg.level = 1;
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msg.trigger_mode = irq->trigger_mode;
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msg_out->address = msg.msi_addr;
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msg_out->data = msg.msi_data;
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}
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X86IOMMUState *x86_iommu_get_default(void)
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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PCMachineState *pcms =
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PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE));
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if (pcms &&
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object_dynamic_cast(OBJECT(pcms->iommu), TYPE_X86_IOMMU_DEVICE)) {
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return X86_IOMMU_DEVICE(pcms->iommu);
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}
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return NULL;
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}
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static void x86_iommu_realize(DeviceState *dev, Error **errp)
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{
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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X86IOMMUClass *x86_class = X86_IOMMU_DEVICE_GET_CLASS(dev);
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MachineState *ms = MACHINE(qdev_get_machine());
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MachineClass *mc = MACHINE_GET_CLASS(ms);
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PCMachineState *pcms =
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PC_MACHINE(object_dynamic_cast(OBJECT(ms), TYPE_PC_MACHINE));
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QLIST_INIT(&x86_iommu->iec_notifiers);
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bool irq_all_kernel = kvm_irqchip_in_kernel() && !kvm_irqchip_is_split();
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if (!pcms || !pcms->pcibus) {
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error_setg(errp, "Machine-type '%s' not supported by IOMMU",
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mc->name);
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return;
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}
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/* If the user didn't specify IR, choose a default value for it */
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if (x86_iommu->intr_supported == ON_OFF_AUTO_AUTO) {
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x86_iommu->intr_supported = irq_all_kernel ?
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ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
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}
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/* Both Intel and AMD IOMMU IR only support "kernel-irqchip={off|split}" */
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if (x86_iommu_ir_supported(x86_iommu) && irq_all_kernel) {
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error_setg(errp, "Interrupt Remapping cannot work with "
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"kernel-irqchip=on, please use 'split|off'.");
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return;
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}
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if (x86_class->realize) {
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x86_class->realize(dev, errp);
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}
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}
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static const Property x86_iommu_properties[] = {
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DEFINE_PROP_ON_OFF_AUTO("intremap", X86IOMMUState,
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intr_supported, ON_OFF_AUTO_AUTO),
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DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false),
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DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true),
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};
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static void x86_iommu_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = x86_iommu_realize;
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device_class_set_props(dc, x86_iommu_properties);
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}
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bool x86_iommu_ir_supported(X86IOMMUState *s)
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{
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return s->intr_supported == ON_OFF_AUTO_ON;
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}
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static const TypeInfo x86_iommu_info = {
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.name = TYPE_X86_IOMMU_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(X86IOMMUState),
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.class_init = x86_iommu_class_init,
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.class_size = sizeof(X86IOMMUClass),
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.abstract = true,
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};
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static void x86_iommu_register_types(void)
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{
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type_register_static(&x86_iommu_info);
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}
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type_init(x86_iommu_register_types)
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