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- Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= =cjz8 -----END PGP SIGNATURE----- Merge tag 'exec-20241220' of https://github.com/philmd/qemu into staging Accel & Exec patch queue - Ignore writes to CNTP_CTL_EL0 on HVF ARM (Alexander) - Add '-d invalid_mem' logging option (Zoltan) - Create QOM containers explicitly (Peter) - Rename sysemu/ -> system/ (Philippe) - Re-orderning of include/exec/ headers (Philippe) Move a lot of declarations from these legacy mixed bag headers: . "exec/cpu-all.h" . "exec/cpu-common.h" . "exec/cpu-defs.h" . "exec/exec-all.h" . "exec/translate-all" to these more specific ones: . "exec/page-protection.h" . "exec/translation-block.h" . "user/cpu_loop.h" . "user/guest-host.h" . "user/page-protection.h" # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmdlnyAACgkQ4+MsLN6t # wN6mBw//QFWi7CrU+bb8KMM53kOU9C507tjn99LLGFb5or73/umDsw6eo/b8DHBt # KIwGLgATel42oojKfNKavtAzLK5rOrywpboPDpa3SNeF1onW+99NGJ52LQUqIX6K # A6bS0fPdGG9ZzEuPpbjDXlp++0yhDcdSgZsS42fEsT7Dyj5gzJYlqpqhiXGqpsn8 # 4Y0UMxSL21K3HEexlzw2hsoOBFA3tUm2ujNDhNkt8QASr85yQVLCypABJnuoe/// # 5Ojl5wTBeDwhANET0rhwHK8eIYaNboiM9fHopJYhvyw1bz6yAu9jQwzF/MrL3s/r # xa4OBHBy5mq2hQV9Shcl3UfCQdk/vDaYaWpgzJGX8stgMGYfnfej1SIl8haJIfcl # VMX8/jEFdYbjhO4AeGRYcBzWjEJymkDJZoiSWp2NuEDi6jqIW+7yW1q0Rnlg9lay # ShAqLK5Pv4zUw3t0Jy3qv9KSW8sbs6PQxtzXjk8p97rTf76BJ2pF8sv1tVzmsidP # 9L92Hv5O34IqzBu2oATOUZYJk89YGmTIUSLkpT7asJZpBLwNM2qLp5jO00WVU0Sd # +kAn324guYPkko/TVnjC/AY7CMu55EOtD9NU35k3mUAnxXT9oDUeL4NlYtfgrJx6 # x1Nzr2FkS68+wlPAFKNSSU5lTjsjNaFM0bIJ4LCNtenJVP+SnRo= # =cjz8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Dec 2024 11:45:20 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'exec-20241220' of https://github.com/philmd/qemu: (59 commits) util/qemu-timer: fix indentation meson: Do not define CONFIG_DEVICES on user emulation system/accel-ops: Remove unnecessary 'exec/cpu-common.h' header system/numa: Remove unnecessary 'exec/cpu-common.h' header hw/xen: Remove unnecessary 'exec/cpu-common.h' header target/mips: Drop left-over comment about Jazz machine target/mips: Remove tswap() calls in semihosting uhi_fstat_cb() target/xtensa: Remove tswap() calls in semihosting simcall() helper accel/tcg: Un-inline translator_is_same_page() accel/tcg: Include missing 'exec/translation-block.h' header accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h' qemu/coroutine: Include missing 'qemu/atomic.h' header exec/translation-block: Include missing 'qemu/atomic.h' header accel/tcg: Declare cpu_loop_exit_requested() in 'exec/cpu-common.h' exec/cpu-all: Include 'cpu.h' earlier so MMU_USER_IDX is always defined target/sparc: Move sparc_restore_state_to_opc() to cpu.c target/sparc: Uninline cpu_get_tb_cpu_state() target/loongarch: Declare loongarch_cpu_dump_state() locally user: Move various declarations out of 'exec/exec-all.h' ... Conflicts: hw/char/riscv_htif.c hw/intc/riscv_aplic.c target/s390x/cpu.c Apply sysemu header path changes to not in the pull request. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
200 lines
5.9 KiB
C
200 lines
5.9 KiB
C
/*
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* QEMU 16550A UART emulation
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2008 Citrix Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "system/system.h"
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#include "hw/acpi/acpi_aml_interface.h"
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#include "hw/char/serial.h"
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#include "hw/char/serial-isa.h"
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#include "hw/isa/isa.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#include "qom/object.h"
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OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL)
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struct ISASerialState {
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ISADevice parent_obj;
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uint32_t index;
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uint32_t iobase;
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uint32_t isairq;
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SerialState state;
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};
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static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = {
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0x3f8, 0x2f8, 0x3e8, 0x2e8
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};
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static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = {
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4, 3, 4, 3
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};
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static void serial_isa_realizefn(DeviceState *dev, Error **errp)
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{
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static int index;
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ISADevice *isadev = ISA_DEVICE(dev);
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ISASerialState *isa = ISA_SERIAL(dev);
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SerialState *s = &isa->state;
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if (isa->index == -1) {
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isa->index = index;
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}
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if (isa->index >= MAX_ISA_SERIAL_PORTS) {
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error_setg(errp, "Max. supported number of ISA serial ports is %d.",
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MAX_ISA_SERIAL_PORTS);
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return;
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}
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if (isa->iobase == -1) {
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isa->iobase = isa_serial_io[isa->index];
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}
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if (isa->isairq == -1) {
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isa->isairq = isa_serial_irq[isa->index];
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}
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index++;
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s->irq = isa_get_irq(isadev, isa->isairq);
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qdev_realize(DEVICE(s), NULL, errp);
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qdev_set_legacy_instance_id(dev, isa->iobase, 3);
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memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8);
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isa_register_ioport(isadev, &s->io, isa->iobase);
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}
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static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope)
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{
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ISASerialState *isa = ISA_SERIAL(adev);
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Aml *dev;
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Aml *crs;
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crs = aml_resource_template();
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aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08));
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aml_append(crs, aml_irq_no_flags(isa->isairq));
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dev = aml_device("COM%d", isa->index + 1);
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501")));
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aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1)));
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aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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static const VMStateDescription vmstate_isa_serial = {
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.name = "serial",
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.version_id = 3,
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.minimum_version_id = 2,
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.fields = (const VMStateField[]) {
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VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState),
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VMSTATE_END_OF_LIST()
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}
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};
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static const Property serial_isa_properties[] = {
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DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
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DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
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DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
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};
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static void serial_isa_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
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dc->realize = serial_isa_realizefn;
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dc->vmsd = &vmstate_isa_serial;
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adevc->build_dev_aml = serial_isa_build_aml;
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device_class_set_props(dc, serial_isa_properties);
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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}
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static void serial_isa_initfn(Object *o)
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{
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ISASerialState *self = ISA_SERIAL(o);
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object_initialize_child(o, "serial", &self->state, TYPE_SERIAL);
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qdev_alias_all_properties(DEVICE(&self->state), o);
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}
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static const TypeInfo serial_isa_info = {
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.name = TYPE_ISA_SERIAL,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISASerialState),
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.instance_init = serial_isa_initfn,
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.class_init = serial_isa_class_initfn,
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_ACPI_DEV_AML_IF },
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{ },
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},
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};
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static void serial_register_types(void)
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{
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type_register_static(&serial_isa_info);
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}
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type_init(serial_register_types)
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static void serial_isa_init(ISABus *bus, int index, Chardev *chr)
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{
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DeviceState *dev;
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ISADevice *isadev;
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isadev = isa_new(TYPE_ISA_SERIAL);
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "index", index);
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qdev_prop_set_chr(dev, "chardev", chr);
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isa_realize_and_unref(isadev, bus, &error_fatal);
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}
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void serial_hds_isa_init(ISABus *bus, int from, int to)
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{
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int i;
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assert(from >= 0);
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assert(to <= MAX_ISA_SERIAL_PORTS);
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for (i = from; i < to; ++i) {
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if (serial_hd(i)) {
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serial_isa_init(bus, i, serial_hd(i));
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}
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}
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}
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void isa_serial_set_iobase(ISADevice *serial, hwaddr iobase)
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{
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ISASerialState *s = ISA_SERIAL(serial);
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serial->ioport_id = iobase;
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s->iobase = iobase;
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memory_region_set_address(&s->state.io, s->iobase);
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}
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void isa_serial_set_enabled(ISADevice *serial, bool enabled)
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{
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memory_region_set_enabled(&ISA_SERIAL(serial)->state.io, enabled);
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}
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