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565a84c1e6
clang-built s390x branch-relative-long test fails on clang-built s390x QEMU due to the following sequence of events: - The test zeroes out a code page, clang generates exrl+xc for this. - do_helper_xc() is called. Clang generates exrl+xc there as well. - Since there already exists a TB for the code in question, its page is read-only and SIGSEGV is raised. - host_signal_handler() calls host_signal_write() and the latter does not recognize exrl as a write. Therefore page_unprotect() is not called and the signal is forwarded to the test. Fix by treating EXRL (and EX, just in case) as writes. There may be false positives, but they will lead only to an extra page_unprotect() call. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220504114819.1729737-1-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
113 lines
3.3 KiB
C
113 lines
3.3 KiB
C
/*
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* host-signal.h: signal info dependent on the host architecture
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2021 Linaro Limited
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*
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* This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef S390_HOST_SIGNAL_H
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#define S390_HOST_SIGNAL_H
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/* The third argument to a SA_SIGINFO handler is ucontext_t. */
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typedef ucontext_t host_sigcontext;
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static inline uintptr_t host_signal_pc(host_sigcontext *uc)
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{
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return uc->uc_mcontext.psw.addr;
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}
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static inline void host_signal_set_pc(host_sigcontext *uc, uintptr_t pc)
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{
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uc->uc_mcontext.psw.addr = pc;
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}
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static inline void *host_signal_mask(host_sigcontext *uc)
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{
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return &uc->uc_sigmask;
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}
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static inline bool host_signal_write(siginfo_t *info, host_sigcontext *uc)
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{
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uint16_t *pinsn = (uint16_t *)host_signal_pc(uc);
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/*
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* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
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* of the normal 2 arguments. The 4th argument contains the "Translation-
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* Exception Identification for DAT Exceptions" from the hardware (aka
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* "int_parm_long"), which does in fact contain the is_write value.
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* The rt signal handler, as far as I can tell, does not give this value
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* at all. Not that we could get to it from here even if it were.
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* So fall back to parsing instructions. Treat read-modify-write ones as
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* writes, which is not fully correct, but for tracking self-modifying code
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* this is better than treating them as reads. Checking si_addr page flags
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* might be a viable improvement, albeit a racy one.
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*/
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/* ??? This is not even close to complete. */
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switch (pinsn[0] >> 8) {
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case 0x50: /* ST */
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case 0x42: /* STC */
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case 0x40: /* STH */
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case 0x44: /* EX */
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case 0xba: /* CS */
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case 0xbb: /* CDS */
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return true;
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case 0xc4: /* RIL format insns */
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switch (pinsn[0] & 0xf) {
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case 0xf: /* STRL */
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case 0xb: /* STGRL */
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case 0x7: /* STHRL */
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return true;
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}
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break;
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case 0xc6: /* RIL-b format insns */
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switch (pinsn[0] & 0xf) {
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case 0x0: /* EXRL */
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return true;
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}
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break;
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case 0xc8: /* SSF format insns */
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switch (pinsn[0] & 0xf) {
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case 0x2: /* CSST */
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return true;
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}
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break;
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case 0xe3: /* RXY format insns */
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switch (pinsn[2] & 0xff) {
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case 0x50: /* STY */
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case 0x24: /* STG */
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case 0x72: /* STCY */
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case 0x70: /* STHY */
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case 0x8e: /* STPQ */
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case 0x3f: /* STRVH */
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case 0x3e: /* STRV */
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case 0x2f: /* STRVG */
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return true;
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}
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break;
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case 0xeb: /* RSY format insns */
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switch (pinsn[2] & 0xff) {
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case 0x14: /* CSY */
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case 0x30: /* CSG */
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case 0x31: /* CDSY */
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case 0x3e: /* CDSG */
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case 0xe4: /* LANG */
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case 0xe6: /* LAOG */
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case 0xe7: /* LAXG */
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case 0xe8: /* LAAG */
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case 0xea: /* LAALG */
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case 0xf4: /* LAN */
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case 0xf6: /* LAO */
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case 0xf7: /* LAX */
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case 0xfa: /* LAAL */
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case 0xf8: /* LAA */
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return true;
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}
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break;
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}
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return false;
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}
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#endif
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