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8b28cde403
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-19-f4bug@amsat.org>
29 lines
772 B
C
29 lines
772 B
C
/*
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* MIPS internal definitions and helpers (TCG accelerator)
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef MIPS_TCG_INTERNAL_H
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#define MIPS_TCG_INTERNAL_H
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#include "hw/core/cpu.h"
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#include "cpu.h"
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void mips_cpu_do_interrupt(CPUState *cpu);
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bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#if !defined(CONFIG_USER_ONLY)
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void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
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uint32_t cpu_mips_get_random(CPUMIPSState *env);
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#endif /* !CONFIG_USER_ONLY */
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#endif
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