Ivanov Arkasha 56b90e60c4 target/avr: Fix interrupt execution ... Only one interrupt is in progress at the moment. It is only necessary to set to reset interrupt_request after all interrupts have been executed. Signed-off-by: Ivanov Arkasha <ivanovrkasha@gmail.com> Message-Id: <20210312164754.18437-1-arkaisp2021@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Michael Rolnik <mrolnik@gmail.com>		2021-03-15 00:39:52 +01:00
..
cpu-param.h	target/avr: Add basic parameters of the new platform	2020-07-10 17:58:32 +02:00
cpu-qom.h	qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros	2020-09-18 14:12:32 -04:00
cpu.c	target/avr/cpu: Use device_class_set_parent_realize()	2021-02-20 12:36:19 +01:00
cpu.h	target/avr: Add support for disassembling via option '-d in_asm'	2020-07-11 11:02:05 +02:00
disas.c	meson: target	2020-08-21 06:30:35 -04:00
gdbstub.c	target/avr: CPU class: Add GDB support	2020-07-10 17:58:32 +02:00
helper.c	target/avr: Fix interrupt execution	2021-03-15 00:39:52 +01:00
helper.h	target/avr: Add instruction helpers	2020-07-11 11:02:05 +02:00
insn.decode	target/avr: Add instruction translation - MCU Control Instructions	2020-07-11 11:02:05 +02:00
machine.c	migration: Replace migration's JSON writer by the general one	2020-12-19 10:39:16 +01:00
meson.build	meson: target	2020-08-21 06:30:35 -04:00
translate.c	meson: target	2020-08-21 06:30:35 -04:00