qemu/bsd-user/riscv
Mark Corbin 8951b87da4 bsd-user: Add RISC-V ELF definitions and hardware capability detection
Introduced RISC-V specific ELF definitions and hardware capability
detection.
Additionally, a function to retrieve hardware capabilities
('get_elf_hwcap') is implemented, which returns the common bits set in
each CPU's ISA strings.

Signed-off-by: Mark Corbin <mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh <itachis@FreeBSD.org>
Co-authored-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240916155119.14610-6-itachis@FreeBSD.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-10-02 15:11:52 +10:00
..
target_arch.h bsd-user: Implement RISC-V TLS register setup 2024-10-02 15:11:52 +10:00
target_arch_cpu.c bsd-user: Implement RISC-V TLS register setup 2024-10-02 15:11:52 +10:00
target_arch_cpu.h bsd-user: Implement RISC-V CPU register cloning and reset functions 2024-10-02 15:11:52 +10:00
target_arch_elf.h bsd-user: Add RISC-V ELF definitions and hardware capability detection 2024-10-02 15:11:52 +10:00