qemu/fpu
Richard Henderson 8704c753e8 softfloat: Pad array size in pick_nan_muladd
While all indices into val[] should be in [0-2], the mask
applied is two bits.  To help static analysis see there is
no possibility of read beyond the end of the array, pad the
array to 4 entries, with the final being (implicitly) NULL.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20241203203949.483774-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-12-11 15:31:08 +00:00
..
meson.build meson: Split out fpu/meson.build 2021-06-11 09:26:28 -07:00
softfloat-parts-addsub.c.inc softfloat: Move addsub_floats to softfloat-parts.c.inc 2021-05-16 07:13:51 -05:00
softfloat-parts.c.inc softfloat: Pad array size in pick_nan_muladd 2024-12-11 15:31:08 +00:00
softfloat-specialize.c.inc softfloat: Inline pickNaNMulAdd 2024-12-11 15:31:08 +00:00
softfloat.c fpu: Handle m68k extended precision denormals properly 2023-09-16 14:57:16 +00:00