Michael Rolnik 865f3bb9e1 target/avr: Add instruction translation - Arithmetic and Logic Instructions ... This includes: - ADD, ADC, ADIW - SBIW, SUB, SUBI, SBC, SBCI - AND, ANDI - OR, ORI, EOR - COM, NEG - INC, DEC - MUL, MULS, MULSU - FMUL, FMULS, FMULSU - DES Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-12-huth@tuxfamily.org> [PMD: Added qemu_log_mask(LOG_UNIMP) in trans_DES()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>		2020-07-11 11:02:05 +02:00
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cpu-param.h	target/avr: Add basic parameters of the new platform	2020-07-10 17:58:32 +02:00
cpu-qom.h	target/avr: Introduce basic CPU class object	2020-07-10 17:58:32 +02:00
cpu.c	target/avr: Add definitions of AVR core types	2020-07-10 17:58:32 +02:00
cpu.h	target/avr: Introduce enumeration AVRFeature	2020-07-10 17:58:32 +02:00
gdbstub.c	target/avr: CPU class: Add GDB support	2020-07-10 17:58:32 +02:00
helper.c	target/avr: Add instruction helpers	2020-07-11 11:02:05 +02:00
helper.h	target/avr: Add instruction helpers	2020-07-11 11:02:05 +02:00
insn.decode	target/avr: Add instruction translation - Arithmetic and Logic Instructions	2020-07-11 11:02:05 +02:00
machine.c	target/avr: CPU class: Add migration support	2020-07-10 17:58:32 +02:00
translate.c	target/avr: Add instruction translation - Arithmetic and Logic Instructions	2020-07-11 11:02:05 +02:00