qemu/tests/tcg/hexagon
Taylor Simpson 83853ea0ef Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur
Here are example instructions with a predicated .tmp/.cur assignment
    if (p1) v12.tmp = vmem(r7 + #0)
    if (p0) v12.cur = vmem(r9 + #0)
The .tmp/.cur indicates that references to v12 in the same packet
take the result of the load.  However, when the predicate is false,
the value at the start of the packet should be used.  After the packet
commits, the .tmp value is dropped, but the .cur value is maintained.

To fix this bug, we preload the original value from the HVX register
into the temporary used for the result.

Test cases added to tests/tcg/hexagon/hvx_misc.c

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Co-authored-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20221108162906.3166-3-tsimpson@quicinc.com>
2022-12-16 10:10:28 -08:00
..
atomics.c Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc 2021-02-18 07:48:22 -08:00
brev.c Hexagon (target/hexagon) bit reverse (brev) addressing 2021-05-01 16:03:10 -07:00
circ.c Hexagon (target/hexagon) fix bug in circular addressing 2022-03-12 09:14:22 -08:00
dual_stores.c Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc 2021-02-18 07:48:22 -08:00
first.S Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc 2021-02-18 07:48:22 -08:00
float_convd.ref Hexagon (tests/tcg/hexagon) reference file for float_convd 2022-07-31 16:22:09 -07:00
float_convs.ref tests/tcg/multiarch: Read fp flags before printf 2022-01-18 16:44:16 +00:00
float_madds.ref tests/tcg/multiarch: Read fp flags before printf 2022-01-18 16:44:16 +00:00
fpstuff.c Hexagon (target/hexagon) properly handle NaN in dfmin/dfmax/sfmin/sfmax 2022-03-12 09:14:22 -08:00
hex_sigsegv.c Hexagon (target/hexagon) probe the stores in a packet at start of commit 2021-10-06 10:29:11 -05:00
hvx_histogram.c Hexagon HVX (tests/tcg/hexagon) histogram test 2021-11-03 16:01:38 -05:00
hvx_histogram_input.h Hexagon HVX (tests/tcg/hexagon) histogram test 2021-11-03 16:01:38 -05:00
hvx_histogram_row.h Hexagon HVX (tests/tcg/hexagon) histogram test 2021-11-03 16:01:38 -05:00
hvx_histogram_row.S Hexagon HVX (tests/tcg/hexagon) histogram test 2021-11-03 16:01:38 -05:00
hvx_misc.c Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur 2022-12-16 10:10:28 -08:00
load_align.c Hexagon (target/hexagon) load into shifted register instructions 2021-05-01 16:06:11 -07:00
load_unpack.c Hexagon (tests/tcg/hexagon) Fix alignment in load_unpack.c 2022-07-31 16:22:09 -07:00
Makefile.target Hexagon (target/hexagon) fix bug in mem_noshuf load exception 2022-07-19 14:20:08 -07:00
mem_noshuf.c Hexagon (target/hexagon) fix store w/mem_noshuf & predicated load 2022-07-19 14:20:08 -07:00
mem_noshuf_exception.c Hexagon (target/hexagon) fix bug in mem_noshuf load exception 2022-07-19 14:20:08 -07:00
misc.c Hexagon (target/hexagon) fix l2fetch instructions 2021-06-29 11:32:50 -05:00
multi_result.c Hexagon (target/hexagon) add A4_addp_c/A4_subp_c 2021-05-01 08:31:43 -07:00
overflow.c Hexagon (tests/tcg/hexagon) update overflow test 2022-03-12 09:14:22 -08:00
preg_alias.c Hexagon (target/hexagon) assignment to c4 should wait until packet commit 2022-03-12 09:14:22 -08:00
scatter_gather.c Hexagon HVX (tests/tcg/hexagon) scatter_gather test 2021-11-03 16:01:38 -05:00
usr.c Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero 2022-09-19 11:55:23 -07:00
vector_add_int.c Hexagon HVX (tests/tcg/hexagon) vector_add_int test 2021-11-03 16:01:37 -05:00